Hi,
I have been looking for ways to implement CMSIS SPI interface and to use its CRC calculator on STM32F4 MCU. I prefer to use embedded CRC than the 32-bit CRC peripheral because I think it will require less CPU intervention.
However, after going through the CMSIS driver source code, it was obvious to me that CRC is not supported yet.
Is there any reason why it is not supported? Is there any work-around? Or am I having any understanding problem?
Your help and explanation is very much appreciated.
ST Goh
ST's NSS and CRC implementation is rather obtuse. On the transmit side you must manage the switch between data output and CRC output. You'd want to familiarize yourself with the protocol and the hardware.
Does your data lend itself to be sent as small blocks/bursts? Do you want to handle it at a byte level? Do you plan on using DMA?
An 8-bit CRC in software can be implemented quite efficiently with tables.
Hi Clive One,
Thanks for your reply.
I have found the solution.
My project involve a data stream of over 10kB. I know CRC-8 is not efficient for data integrity in this case. For critical data section I use CRC32 to double check. But for less important data, CRC-8 is good enough.
The problem was, most of the available documents/application notes/discussions I could find are on CRC with non-CMSIS form. But in my case I have to use CMSIS SPI interface based to our project director's decision.
So the first problem I had was the initialisation in CMSIS, as in the SPI_Driver_Handler->Control() routine does not support initialisation of CRC related register and flag
Secondly, the interface handler routines do not help to Reset CRC register, read DR to reset RXNE, and to clear CRCERR flag if there is any.
So in the end I had to do them manually. Luckily, it is not so tedious after all.