Hi,
Does someone know if it is possible to implement shared semaphores within dual-core architecture using CMSIS library.
I am working with a LPC4337 dual-core and need to access the same peripheral with both cores. I tried to use a variable osSemaphoreId mapped in the same address for both firmware but it doesn't work.
Or should I use my own variable and write my own semaphore access ? :/
The Cortex-M0+ core in the NXP LPC4000 series does not offer LDEX/STEX instructions. Since you cannot disable interrupts from the "other" core it is hard to implement an true atomic instruction.
What type of peripheral access do you need to protect?
Hi, thank you for your reply
I want to protect SD Card access. Both core have to read/write files.
But I think I will try to modify my application in order to access SDCard only with one core (and make an IPC to communicate files content to the other core).
It's way better to queue file accesses implementing a single "file server thread" than to try complex solutions. Especially since file system accidents doesn't get solved with a simple reset but can cost lots of already collected information.