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Dual core debug of NXP LPC4000

I am referring to this article: http://www.keil.com/pr/article/1227.htm

I was wondering why there is no support for a single session (Keil window) debug? Why do I have to open two windows, why can't the debug be merged? Won't I have issues when something fails with both the cores active?

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  • I am looking at it from a debug angle, in situations where failure happens only when both the cores are running and it proves tough to crack the root cause under some specific sequence. It is quite common in slightly more complex SoCs such as those with ARM A series.

    I totally agree that if there is nothing to debug together, we rather make the environment separate.

    I am wondering if a single session debug is available in their LPCxpresso, which I believe is Eclipse based. I do not think even IAR supports this feature.

    So how do we debug multi-core failures in this case?

    • You have to keep two windows open in two monitors. Also implies you have to keep them open to see status of running or halt.
    • For all shared resources, you have to keep looking between Register / Memory windows up on either Core Halt.
    • Single stepping two cores sequentially can also be an inconvenience, when trying to reproduce the problem.

    Well, as Andrew Neil commented, you can't have everything in one plate...

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  • I am looking at it from a debug angle, in situations where failure happens only when both the cores are running and it proves tough to crack the root cause under some specific sequence. It is quite common in slightly more complex SoCs such as those with ARM A series.

    I totally agree that if there is nothing to debug together, we rather make the environment separate.

    I am wondering if a single session debug is available in their LPCxpresso, which I believe is Eclipse based. I do not think even IAR supports this feature.

    So how do we debug multi-core failures in this case?

    • You have to keep two windows open in two monitors. Also implies you have to keep them open to see status of running or halt.
    • For all shared resources, you have to keep looking between Register / Memory windows up on either Core Halt.
    • Single stepping two cores sequentially can also be an inconvenience, when trying to reproduce the problem.

    Well, as Andrew Neil commented, you can't have everything in one plate...

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