My first question is regarding SBUF register of 8051. How come it is two registers while locations is only one i.e; 99H. we call SBUF physically two registers (write only and read only two separate distinct registers as scott mackenzie calls it in his book on 8051)? I studied the 8051 bible on hardware but the timing diagram and the circuitry shown there (Fig-13, Pg:12) was too confusing and difficult to comprehend the operation.
my next question is, where is this shift register and what has it got to how and why it shifts the bits to right. One of the books i studied online on google, mentions that shift register is external. Pardon me if i am asking very basic or easy questions but i am kinda geek in this domain and some how i havent figured out the logic behind physically two registers at same location and shift register operation and location after spending half day through different tutorials. please explain it in simple terms.
It can be any thing at the hardware level. Why bother that much as long as you have a brief understanding of the operation.
The read-only SBUF can be a SIPO register (serial in parallel out, with read signal acting as enable output signal and Rxd pin connected to serial input and the parallel output connected to data bus);
and write-only SBUF can be a PISO register (parallel in serial out, with write signal acting as enable input signal and data bus connected to parallel input and the serial output connected to Txd output pin)
and there is not separate shift-register at-all.
PS: for better understanding of the terms, you must know the four basic register configurations, Viz, SIPO, SISO, PIPO, PISO.
For an UART, you don't want to merge register with serial register - you want to be able to start receiving a second character in the shift register while the processor waits for the program to pick up the received byte from a buffer.
And preferably, you want to be able to store a byte to send while the send shift register is busy shifting out a byte - this allows the processor to be able to shift out the stop bits and then decide to start with start bit + next byte instead of having to wait for the software to react and insert a new character to send.
But some simple SPI implementations do integrate everything.
But as noted - you don't need to know what makes the individual transistors switch their states. What you need to know is what register flags to keep track off, what can trig an interrupt and what reaction times you are allowed when on the receiving end and if you as sender can enqueue many characters without having to wait for any shift register ticking.
The documentation for the UART:s contains the relevant information - the actual implementation is left for the silicon engineers.