Hi,
I use LPC4357 board and try to debug on sdram, but i meet the problem on it. download program is OK, but verify is fail. The following is the message and ini file. Who can give me advise? Thanks.
Robert
Programming Done. Contents mismatch at: 28000006H (Flash=12H Required=00H) ! Contents mismatch at: 28000007H (Flash=FCH Required=28H) ! Contents mismatch at: 28000010H (Flash=75H Required=C5H) ! Contents mismatch at: 28000011H (Flash=72H Required=02H) ! Contents mismatch at: 28000020H (Flash=13H Required=D3H) ! Contents mismatch at: 28000021H (Flash=3CH Required=02H) ! Contents mismatch at: 28000040H (Flash=E8H Required=D5H) ! Contents mismatch at: 28000041H (Flash=E6H Required=02H) ! Contents mismatch at: 28000050H (Flash=30H Required=D5H) ! Contents mismatch at: 28000051H (Flash=4DH Required=02H) ! Contents mismatch at: 28000070H (Flash=38H Required=D5H) ! Contents mismatch at: 28000071H (Flash=F1H Required=02H) ! Contents mismatch at: 28000080H (Flash=EBH Required=D5H) ! Contents mismatch at: 28000081H (Flash=3AH Required=02H) ! Contents mismatch at: 28000090H (Flash=DCH Required=D5H) ! Contents mismatch at: 28000091H (Flash=7BH Required=02H) ! Contents mismatch at: 280000A8H (Flash=55H Required=D5H) ! Contents mismatch at: 280000A9H (Flash=00H Required=02H) ! Contents mismatch at: 280000AAH (Flash=55H Required=00H) ! Contents mismatch at: 280000ABH (Flash=00H Required=28H) ! Contents mismatch at: 28000130H (Flash=C7H Required=60H) ! Contents mismatch at: 28000131H (Flash=6AH Required=F8H) ! Contents mismatch at: 28000140H (Flash=C0H Required=FBH) ! Contents mismatch at: 28000141H (Flash=68H Required=1AH) ! Contents mismatch at: 28000150H (Flash=E3H Required=0AH) ! Contents mismatch at: 28000151H (Flash=96H Required=44H) ! Contents mismatch at: 280001A0H (Flash=8DH Required=6DH) ! Contents mismatch at: 280001A1H (Flash=68H Required=1EH) ! Contents mismatch at: 280001C0H (Flash=E0H Required=30H) ! Contents mismatch at: 280001C1H (Flash=80H Required=C1H) ! Contents mismatch at: 280001D0H (Flash=92H Required=15H) ! Contents mismatch at: 280001D1H (Flash=98H Required=F0H) ! Contents mismatch at: 280001E0H (Flash=04H Required=20H) ! Contents mismatch at: 280001E1H (Flash=E0H Required=F0H) ! Contents mismatch at: 28000206H (Flash=09H Required=FFH) ! Contents mismatch at: 28000207H (Flash=47H Required=F7H) ! Contents mismatch at: 28000280H (Flash=7EH Required=11H) ! Contents mismatch at: 28000281H (Flash=ACH Required=88H) ! Contents mismatch at: 280002A8H (Flash=55H Required=4FH) ! Contents mismatch at: 280002A9H (Flash=00H Required=F0H) ! Contents mismatch at: 280002AAH (Flash=55H Required=A0H) ! Contents mismatch at: 280002ABH (Flash=00H Required=01H) ! Contents mismatch at: 280002C0H (Flash=3BH Required=FEH) ! Contents mismatch at: 280002C1H (Flash=BEH Required=E7H) ! Contents mismatch at: 280002D0H (Flash=2EH Required=FEH) ! Contents mismatch at: 280002D1H (Flash=DEH Required=E7H) ! Contents mismatch at: 280002E0H (Flash=CFH Required=70H) ! Contents mismatch at: 280002E1H (Flash=A9H Required=47H) ! Contents mismatch at: 280002F0H (Flash=B8H Required=A8H) ! Contents mismatch at: 280002F1H (Flash=BAH Required=C6H) ! Contents mismatch at: 28000300H (Flash=F1H Required=80H) ! Contents mismatch at: 28000301H (Flash=72H Required=F1H) ! Contents mismatch at: 28000370H (Flash=2EH Required=BDH) ! Contents mismatch at: 28000371H (Flash=DEH Required=E8H) ! Contents mismatch at: 28000380H (Flash=FFH Required=01H) ! Contents mismatch at: 28000381H (Flash=28H Required=2DH) ! Contents mismatch at: 28000390H (Flash=0EH Required=5CH) ! Contents mismatch at: 28000391H (Flash=E1H Required=FAH) ! Contents mismatch at: 280003A0H (Flash=CCH Required=1CH) ! Contents mismatch at: 280003A1H (Flash=A1H Required=F8H) ! Contents mismatch at: 280003B0H (Flash=26H Required=64H) ! Contents mismatch at: 280003B1H (Flash=E3H Required=1CH) ! Contents mismatch at: 280003C0H (Flash=40H Required=F0H) ! Contents mismatch at: 280003C1H (Flash=15H Required=03H) ! Contents mismatch at: 280003E0H (Flash=E1H Required=82H) ! Contents mismatch at: 280003E1H (Flash=82H Required=00H) ! Contents mismatch at: 28000400H (Flash=63H Required=01H) ! Contents mismatch at: 28000401H (Flash=FEH Required=EBH) ! Contents mismatch at: 28000406H (Flash=09H Required=24H) ! Contents mismatch at: 28000407H (Flash=29H Required=78H) ! Contents mismatch at: 28000410H (Flash=79H Required=05H) ! Contents mismatch at: 28000411H (Flash=3BH Required=44H) ! Contents mismatch at: 28000430H (Flash=E8H Required=52H) ! Contents mismatch at: 28000431H (Flash=CEH Required=1EH) ! Contents mismatch at: 28000450H (Flash=E7H Required=04H) ! Contents mismatch at: 28000451H (Flash=BEH Required=49H) ! Contents mismatch at: 28000460H (Flash=12H Required=70H) ! Contents mismatch at: 28000461H (Flash=2DH Required=47H) ! Contents mismatch at: 28000470H (Flash=A8H Required=00H) ! Contents mismatch at: 28000471H (Flash=32H Required=67H) ! Contents mismatch at: 28000490H (Flash=FDH Required=01H) ! Contents mismatch at: 28000491H (Flash=2CH Required=68H) ! Contents mismatch at: 280004A8H (Flash=55H Required=27H) ! Contents mismatch at: 280004A9H (Flash=00H Required=1AH) ! Contents mismatch at: 280004AAH (Flash=55H Required=38H) ! Contents mismatch at: 280004ABH (Flash=00H Required=68H) ! Contents mismatch at: 280004D0H (Flash=E9H Required=80H) ! Contents mismatch at: 280004D1H (Flash=FBH Required=1EH) ! Contents mismatch at: 28000500H (Flash=44H Required=42H) ! Contents mismatch at: 28000501H (Flash=EEH Required=60H) ! Contents mismatch at: 28000540H (Flash=B0H Required=08H) ! Contents mismatch at: 28000541H (Flash=AEH Required=BFH) ! Contents mismatch at: 28000550H (Flash=04H Required=10H) ! Contents mismatch at: 28000551H (Flash=7DH Required=F8H) ! Contents mismatch at: 28000570H (Flash=26H Required=21H) ! Contents mismatch at: 28000571H (Flash=AEH Required=6AH) ! Contents mismatch at: 28000580H (Flash=44H Required=07H) ! Contents mismatch at: 28000581H (Flash=EEH Required=F0H) ! Contents mismatch at: 280005F0H (Flash=01H Required=C4H) ! Contents mismatch at: 280005F1H (Flash=DEH Required=F8H) ! Too many errors to display !
ini file:
FUNC void SDRAM_Setup (void) { // Pin setup // Data Lines 0..31 _WDWORD(0x4008609C, 0x000000F3); _WDWORD(0x400860A0, 0x000000F3); _WDWORD(0x400860A4, 0x000000F3); _WDWORD(0x400860A8, 0x000000F3); _WDWORD(0x400860AC, 0x000000F3); _WDWORD(0x400860B0, 0x000000F3); _WDWORD(0x400860B4, 0x000000F3); _WDWORD(0x400860B8, 0x000000F3); _WDWORD(0x40086290, 0x000000F2); _WDWORD(0x40086294, 0x000000F2); _WDWORD(0x40086298, 0x000000F2); _WDWORD(0x4008629C, 0x000000F2); _WDWORD(0x40086280, 0x000000F2); _WDWORD(0x40086284, 0x000000F2); _WDWORD(0x40086288, 0x000000F2); _WDWORD(0x4008628C, 0x000000F2); _WDWORD(0x40086124, 0x000000F3); _WDWORD(0x40086128, 0x000000F3); _WDWORD(0x4008612C, 0x000000F3); _WDWORD(0x40086130, 0x000000F3); _WDWORD(0x40086134, 0x000000F3); _WDWORD(0x40086080, 0x000000F2); _WDWORD(0x40086084, 0x000000F2); _WDWORD(0x40086088, 0x000000F2); _WDWORD(0x40086120, 0x000000F3); _WDWORD(0x4008611C, 0x000000F3); _WDWORD(0x40086118, 0x000000F2); _WDWORD(0x40086108, 0x000000F2); _WDWORD(0x40086104, 0x000000F2); _WDWORD(0x40086100, 0x000000F2); _WDWORD(0x40086320, 0x000000F1); _WDWORD(0x4008631C, 0x000000F1); _WDWORD(0x400866C0, 0x000000F2); _WDWORD(0x400866BC, 0x000000F2); _WDWORD(0x40086700, 0x000000F3); _WDWORD(0x40086704, 0x000000F3); _WDWORD(0x40086708, 0x000000F3); _WDWORD(0x4008670C, 0x000000F3); _WDWORD(0x40086710, 0x000000F3); _WDWORD(0x40086510, 0x000000F3); _WDWORD(0x40086090, 0x000000F3); _WDWORD(0x40086318, 0x000000F1); _WDWORD(0x400866B4, 0x000000F2); _WDWORD(0x400866A8, 0x000000F2); _WDWORD(0x40086324, 0x000000F3); _WDWORD(0x40086098, 0x000000F3); _WDWORD(0x40086310, 0x000000F3); _WDWORD(0x40086314, 0x000000F3); _WDWORD(0x4008632C, 0x000000F3); _WDWORD(0x40086330, 0x000000F3); _WDWORD(0x40086328, 0x000000F3); _WDWORD(0x40086680, 0x000000F2); _WDWORD(0x40086734, 0x000000F3); _WDWORD(0x4008608C, 0x000000F3); _WDWORD(0x40086090, 0x000000F3); _WDWORD(0x40086094, 0x000000F3); _WDWORD(0x40086098, 0x000000F3); // Configure CLK0 pin as EMC SDRAM CLK 0 _WDWORD(0x40086C00, 0x000000F0); _WDWORD(0x40086C04, 0x000000F0); _WDWORD(0x40086C08, 0x000000F0); _WDWORD(0x40086C0C, 0x000000F0); _WDWORD(0x40086344, 0x000000F3); _WDWORD(0x40086348, 0x000000F3); _WDWORD(0x40086340, 0x000000F3); _WDWORD(0x40086680, 0x000000F2); _WDWORD(0x4008674C, 0x000000F3); // Configure EMC delays _WDWORD(0x40086D00, 0x00006666); // EMCCLKDELAY // Initialize EMC _WDWORD(0x40005000, 0x00000001); // CONTROL=1 = Enable EMC _WDWORD(0x40005008, 0x00000000); // CONFIG=0 _WDWORD(0x40005100, 0x00001280); // DYNAMICCONFIG0 _WDWORD(0x40005140, 0x00001280); // DYNAMICCONFIG2 _WDWORD(0x40005104, 0x00000303); // DYNAMICRASCAS0 _WDWORD(0x40005144, 0x00000303); // DYNAMICRASCAS2 _WDWORD(0x40005028, 0x00000001); // DYNAMICREADCONFIG _WDWORD(0x40005030, 0x00000001); // DYNAMICRP _WDWORD(0x40005034, 0x00000003); // DYNAMICRAS _WDWORD(0x40005038, 0x00000005); // DYNAMICREX _WDWORD(0x4000503C, 0x00000000); // DYNAMICAPR _WDWORD(0x40005040, 0x00000004); // DYNAMICDAL _WDWORD(0x40005044, 0x00000001); // DYNAMICWR _WDWORD(0x40005048, 0x00000005); // DYNAMICRC _WDWORD(0x4000504C, 0x00000005); // DYNAMICRFC _WDWORD(0x40005050, 0x00000005); // DYNAMICXSR _WDWORD(0x40005054, 0x00000001); // DYNAMICRRD _WDWORD(0x40005058, 0x00000001); // DYNAMICMRD _WDWORD(0x40005020, 0x00000183); // DYNAMICCONTROL - NOP _WDWORD(0x40005020, 0x00000103); // DYNAMICCONTROL - PRECHARGE_ALL _WDWORD(0x40005024, 0x00000002); // DYNAMICREFRESH = 2 _WDWORD(0x40005024, 0x00000032); // DYNAMICREFRESH = 50 _WDWORD(0x40005020, 0x00000083); // DYNAMICCONTROL - MODE _RDWORD(0x28006600); // Write 16-bit SDRAM Mode register burst 8 _WDWORD(0x40005020, 0x00000000); // DYNAMICCONTROL = 0 _WDWORD(0x40005100, 0x00081280); // DYNAMICCONFIG0 _WDWORD(0x40005120, 0x00081280); // DYNAMICCONFIG0 _WDWORD(0x40005140, 0x00081280); // DYNAMICCONFIG2 _WDWORD(0x40005160, 0x00081280); // DYNAMICCONFIG2 } FUNC void Setup (unsigned int region) { region &= 0xFF000000; SP = _RDWORD(region); // Setup Stack Pointer PC = _RDWORD(region + 4); // Setup Program Counter _WDWORD(0xE000ED08, region); // Setup Vector Table Offset Register } SDRAM_Setup();
Not sure having all the comparison errors tells us much. No details of the board, or SDRAM.
Suggest you concentrate on the SDRAM timing and geometry settings.
Does the part have any SRAM that you could test the SDRAM from? Have you tested/validated it? How does the INI correlate to other SDRAM initialization code, in C, you know works, or is correct for the board.
Is the .INI complete?
You have a LOAD and g, main in there too?
the board is similar to Keil's MCB4357. There is one chip SDRAM (16MB:MT48LC4m32b2). I can run the program on SPIFI flash, and emwin is ok too, which use VRAM on SDRAM, that is to say SDRAM is OK.
As this ini file is use for program, it do not allow LOAD, g, main command.
As there is not flash chip for SDRAM to add a Algorithm, I just select a 16MB 32bits flash to add Algorithm. Maybe this is the problem.
Who have similar chip film file to adding Algorithm to share? Or give me suggestion?
Many thanks.
When using the script you wouldn't need a flash algorithm
Suggest looking at the project/example for the options/settings and form you're shooting for in a configuration.
\Keil\ARM\Boards\Atmel\AT91SAM9XE-EK\Blinky\Ext_SDRAM.ini
You'll obviously have to adapt to your hardware