Issue with I2C communication

Hi,
I am trying to store some data in 24LC64F EEPROM(Microchip make) by interfacing to LPC1768 Controller and communicating the EEPROM through I2C ,We are facing problem in the I2C communication ,we are not able to write or read the eeprom , i m not getting ack from the 24LC64F Ic after the write operation ,24LC64F is responding with not ack can you please let us know what would be the problem.
Hardware connections are made as given in the 24LC64F datasheet.
Pin 1(A0),Pin2(A1),Pin3 (A2),Pin 4 (VSS) are given to Gnd .
Pin5(SDA line ) is pulled up(2K)to 3.3VCC and is given to SDA pin of the controller.
Pin6(SCL line ) is pulled up(2K) to 3.3VCC and is given to SCL pin of the controller.
Pin7(Wp) is also given to gnd.
Pin8 (Vcc) is connected to 3.3VCC.
As mentioned in the datasheet for 2K pull up resistor I2C clock should be 400K hz, hence we have defined the I2C clock as 400K Hz in our code.
Can you please go through the code and let us know the changes to be made:

/*Main Function*/
 main (void)
{
   SystemClockUpdate(); /* SystemClockUpdate()  updates the SystemFrequency variable */
   SystemInit ();
   I2C1Init( );                 /* initialize I2c1 */
   WriteReg(0xA0,0x00,0x0F);  /* Function Call to write the eeprom 0xA0- 24LC64F Address,
                                 0x00-register address ,0x0F- data to be stored in the eeprom*/
while(1);
 }


/* Subroutine to write */
u8_t WriteReg(u8_t address,u8_t Reg, u8_t Data)
{

     I2CWriteLength[PORT_USED] = 4;
     I2CMasterBuffer[PORT_USED][0] = address;   /*24LC64F Address*/
     I2CMasterBuffer[PORT_USED][1] = (Reg >> 8); /* register address MSB*/
     I2CMasterBuffer[PORT_USED][2] = (Reg & 0xFF);  /* register address LSB*/
     I2CMasterBuffer[PORT_USED][3] = Data;  /* data to be stored in the eeprom*/
     I2CStop(1);
     I2CEngine( PORT_USED );
    Delay(3522);        //3522counts-5msec delay

  return 1;
}
/* Subroutine to Initialize I2C  */
void I2C1Init( void )
{
   LPC_SC->PCONP |= (1 << 19);
 LPC_PINCON->PINSEL1 &= ~((0x3<<6)|(0x3<<8));  /*set PIO0.19 and PIO0.20 to I2C1 SDA and SCL */
 LPC_PINCON->PINSEL1 |= ((0x3<<6)|(0x3<<8));   /* function to 11 on both SDA and SCL. */
 LPC_PINCON->PINMODE_OD0 |= ((0x1<<19)|(0x1<<20));
 /*--- Clear flags ---*/
  LPC_I2C1->CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;
/*--- Reset registers ---*/

  LPC_I2C1->SCLL   = I2SCLL_SCLL;
  LPC_I2C1->SCLH   = I2SCLH_SCLH;
  /* Install interrupt handler */
  NVIC_EnableIRQ(I2C1_IRQn);
  LPC_I2C1->CONSET = I2CONSET_I2EN;
  return;
}

/* I2C Interrupt Subroutine*/
void I2C1_IRQHandler(void)
{
  uint8_t StatValue;
   timeout[1] = 0;
  /* this handler deals with master read and master write only */
   StatValue = LPC_I2C1->STAT;
  switch ( StatValue )
  {
    case 0x08:            /* A Start condition is issued. */
    WrIndex1 = 0;
    LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];
    LPC_I2C1->CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
    break;
    case 0x10:            /* A repeated started is issued */
    RdIndex1 = 0;
    /* Send SLA with R bit set, */
    LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];
    LPC_I2C1->CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
    break;
    case 0x18:            /* Regardless, it's a ACK */
    if ( I2CWriteLength[1] == 1 )
    {
      LPC_I2C1->CONSET = I2CONSET_STO;      /* Set Stop flag */
      I2CMasterState[1] = I2C_NO_DATA;
    }
    else
    {
      LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];
    }
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;

    case 0x28:    /* Data byte has been transmitted, regardless ACK or NACK */
    if ( WrIndex1 < I2CWriteLength[1] )
    {
      LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++]; /* this should be the last one */
    }
    else
    {
      if ( I2CReadLength[1] != 0 )
      {
        LPC_I2C1->CONSET = I2CONSET_STA;    /* Set Repeated-start flag */
      }
      else
      {
        LPC_I2C1->CONSET = I2CONSET_STO;      /* Set Stop flag */
        I2CMasterState[1] = I2C_OK;
      }
    }
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;
    case 0x30:
    LPC_I2C1->CONSET = I2CONSET_STO;      // Set Stop flag
    I2CMasterState[1] = I2C_NACK_ON_DATA;
//     LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;
    case 0x40:    /* Master Receive, SLA_R has been sent */
    if ( (RdIndex1 + 1) < I2CReadLength[1] )
    {
      /* Will go to State 0x50 */
      LPC_I2C1->CONSET = I2CONSET_AA;    /* assert ACK after data is received */
    }
    else
    {
      /* Will go to State 0x58 */
      LPC_I2C1->CONCLR = I2CONCLR_AAC;    /* assert NACK after data is received */
    }
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;

    case 0x50:    /* Data byte has been received, regardless following ACK or NACK */
    I2CSlaveBuffer[1][RdIndex1++] = LPC_I2C1->DAT;
    if ( (RdIndex1 + 1) < I2CReadLength[1] )
    {
      LPC_I2C1->CONSET = I2CONSET_AA;    /* assert ACK after data is received */
    }
    else
    {
      LPC_I2C1->CONCLR = I2CONCLR_AAC;    /* assert NACK on last byte */
    }
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;

    case 0x58:
    //I2CSlaveBuffer[1][RdIndex1++] = LPC_I2C1->DAT;
    data1 = LPC_I2C1->DAT;
    I2CMasterState[1] = I2C_OK;
    LPC_I2C1->CONSET = I2CONSET_STO;    /* Set Stop flag */
    LPC_I2C1->CONCLR = I2CONCLR_SIC;    /* Clear SI flag */
    break;

/**/     case 0x20:    //    regardless, it's a NACK
    LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];
//    LPC_I2C1->CONSET =  I2CONSET_STO;
   // LPC_I2C1->CONCLR = I2CONCLR_SIC;   /* Set Stop flag */
    break;
    case 0x48:
    LPC_I2C1->CONSET = I2CONSET_STO;      /* Set Stop flag */
    I2CMasterState[1] = I2C_NACK_ON_ADDRESS;
 //   LPC_I2C1->DAT = I2CMasterBuffer[1][WrIndex1++];

    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;
    case 0x38: /*Arbitrationlost,in this example,we don't deal with multiple mastersituation*/
    default:

    I2CMasterState[1] = I2C_ARBITRATION_LOST;
    LPC_I2C1->CONCLR = I2CONCLR_SIC;
    break;
  }
  return;

Please any one can give the solution for the I2c communication