I'm using the MDK-ARM and I would like to use an external RAM IC that communicates through SPI as my Stack/heap RAM. instead of the internal RAM that is on my Micro. I just can't seem to find a good resource or tutorial on how to do this. I believe this is a uVision question. I know I have to do something to the start up file and check the box for External RAM in the target options, but how does the compiler control the SPI lines to read and write.
For Example:
char Count;
Count = 1;
How does the compiler know to store Count in external RAM and how does it know how to control the SPI lines.
Is this even possible?
How would the processor know that it have to perform SPI communication to access memory?
Well, you could use an address space region that causes a hard fault when accessed. Then do the magic in the hard fault handler. With some read-ahead and caching you could achieve performance that's better than abysmal. This would take considerable development effort, however.
Yes - especially since we are talking about the stack.
It would be like a PC with almost zero memory, resulting in almost all memory accesses trigging a swap.
So, why does uVision have an option for "Off-chip" RAM for read/write memory? RAM1, RAM2, and RAM3. under the "Options for target" window. If I want to use utilize that, what do I need?
That refers to off-chip memory that sits on a parallel bus and is mapped to address space. By the way, some processors can map SPI memory to address space. But normally this is used for booting off SPI flash memory, and it will be too slow for many purposes.