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I use LPC2119, and Keil uVision4.
My question is, if UART module is set to 2 stop bits, Transmitter must send these two stop bits always, but does receiver must receive two stop bits before set flag for received character.
For example in AVR core , it is written that only transmitter is set for number of stop bits ( 1,2 ). Receiver uses only one stop bit despite of setting of the transmitter.
How it works here on lpc2119. All my test show that full stop bits number, must be received before Receiver to set flag for new character.
Is it possible to lose character if UART module is set to 2 stop bits, and transmission is with one stop bits.
No frame error is generated ,and no character is received.
If sending with two stop bits when receiver expects 1, there will be no problems.
If sending with one stop bit when receiver expects 2, it will go well if you send a single character at a time. But if the transmitter has data so it starts the next transfer too soon, i.e. generates a new start bit before the receiver have seen the two stop bits, then your transmission is not properly fulfilling the requirements of the receiver.
Note that some receivers will sample the second stop bit somewhere in the middle of the stop bit, so it may be happy to get 1.5 stop bits.
What you write is that the AVR UART can be configured to send with 1 or 2 stop bits but will always be configured to receive with 1 stop bit. That is a safe condition.
Requiring two stop bits have two main reasons. 1) It gives slow processors more time to pick up data. 2) It reduces possibility that an UART locks into a random bit train with wrong sync, taking an individual data bit as a start bit and then taking a data bit of the next byte as a stop bit. The extra hold-off from the second stop bit reduces the number of bit conditions that gets accepted and speeds up the synchronization in case data really is sent back-to-back.
If the AVR (with 1 stop bit for receive) doesn't pick up any data then you should verify if the reverse direction works. Or if you have something wrong with your code or wiring or signal levels.
Have you looked at the data with an oscilloscope?
Thank you, Per Westermark, for the answer. I found similar thread , where this UART behavior is called a bug in arm7 uart. comments.gmane.org/.../2107
So, my interrupt driven uart, missing a byte, when other side start transmitting earlier than 2 stop bits,after last transmitted byte from my side.
My hardware is connect in a way, that I can hear my own transmission. So when I transmit byte , I expect to receive it. That is OK. But when other side start transmitting , before second stop bit( after first, but before second), I cannot hear my transmitted byte. It disappeared, and I hear only byte from the other side. That is because UART receiver resync, and start to receive other side byte, but what happened with my own echo, that is not specified. No frame error is generated, and no received byte interrupt is generated ( no RLS or RDA interrupt ). I know that UART module is a legacy 16C550 uart. I search the net, and I found unofficially, that this type of uarts, also expect only one stop bit in the receiver side.If this is true, than lpc2119 must work properly in that situation, but it not happens. In the lpc21xx datasheet is not specified receiver behavior concerning stop bits.
AVR was only for example,that in datasheet is described how UART module works.