This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Why ARM32-bit commands in Cortex disassembly?

As I understand the STM32F4 programming manual (DM00046982), or the Cortex M4 TechRefManual, a Cortex M4 processor as the STM32F4 can only work with Thumb mode (T2 I think).

But if I use the ST4Discovery (with STM32F407) with Keil uVision, in the Dissambly I see as well 32bit-ARMv7 code (32 bit commands), as Thumb code (16 bit commands). E. g. for LDR commands it seems to use the Thumb command for small offsets, and the 32-bit ARM command for larger offsets.

This really puzzles me very much - how can I see 32bit-ARMv7 in the dissassembly listing, if the processor can only understand Thumb code?

Parents
  • Thank you for the fast answer.

    Is "ARMv7" a subset of Thumb-2, or is this exactly Thumb-2?

    If I look at the LDR command in the ARMv7 TechRefManual, there are 4 encodings named:
    - "Encoding T1, All versions of the Thumb instruction set",
    - "Encoding T2, All versions of the Thumb instruction set",
    - "Encoding T3, ARMv7",
    - "Encoding T4, ARMv7"

    Can CortexM4 / STM32F4 use all of these 4 encodings? (I assume Thumb-2 has nothing to do with "Encoding T2"?).

Reply
  • Thank you for the fast answer.

    Is "ARMv7" a subset of Thumb-2, or is this exactly Thumb-2?

    If I look at the LDR command in the ARMv7 TechRefManual, there are 4 encodings named:
    - "Encoding T1, All versions of the Thumb instruction set",
    - "Encoding T2, All versions of the Thumb instruction set",
    - "Encoding T3, ARMv7",
    - "Encoding T4, ARMv7"

    Can CortexM4 / STM32F4 use all of these 4 encodings? (I assume Thumb-2 has nothing to do with "Encoding T2"?).

Children