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have asm get inlined for Cortex-M0?

I have the following inline assembly for GCC that I want to port to Keil's compiler:

#define EnterCritical() \ 
  register uint32_t primask__; \ 
  __ASM volatile ("mrs  %0, primask" : "=r" (primask__) : /* no inputs */ ); \ 
  __disable_irq()

#define ExitCritical() \ 
  __ASM volatile ("msr primask, %0" : "=r" (primask__) : /* no inputs */ )

I have attempted to port it by doing the following:

__forceinline static __ASM uint32_t __EnterCritical(void)
{
  mrs  r0, primask
  cpsid i
}

__forceinline static __ASM void __ExitCritical(uint32_t prm)
{
  msr primask, r0
}

#define EnterCritical() register uint32_t primask__ = __EnterCritical();
#define ExitCritical() __ExitCritical(primask__);

However, the disassembly shows that __EnterCritical and __ExitCritical are not being inlined, they are being called with the BL instruction. How can I duplicate the GCC inline assembly?