Hello,
When coding a simple project (Freescale K40 + Keil IDE) it's possible to set the vector table offset register to the correct ram address. For example: #define RAM_START (0x20000000 - ((RAM_SIZE * 1024)/2)) // SRAM is symmetrical around 0x20000000
After this setup, registering an interrupt is being done by setting its address in the correct offset (RAM_START_ADDRESS + 16 + IRQ number) I've noticed that once the RTX kernel was added to the project, any attempt to modify the vector tables offset (SCB->VTOR = xx) caused the software to jump to hard abort.
Any help please :)
Thanks, Eitan Michaelson.
I've noticed that once the RTX kernel was added to the project, any attempt to modify the vector tables offset (SCB->VTOR = xx) caused the software to jump to hard abort.
That's at least partly because of contradiction of objectives. By using an RTOS like RTX, you've promised to let that RTOS handle a good part of the fundamentals. Interrupt vectoring is well within that part. So no, you shouldn't be trying to fudge with the vector table behind RTX's back.
Technically, the reason almost certainly is that what you're trying to do is only allowed in privileged mode --- but once you've put your code undert RTX control, it's not running in privileged mode any more.
OK, So my question would be, How am supposed to setup an interrupt handler under RTX ? I didn't see any special OS API for this.
Tnx, Eitan
don't know about cortex parts but on arm7/9 it can be done by setting the vector table before the call to initialise rl-arm.
He's talking about RTX - the RTOS - not RL-ARM.
http://www.keil.com/rl-arm/kernel.asp
www.keil.com/.../rlarm_ar_inter_funct.htm
you mean the RTX that is now supplied with source with MDK-ARM which previously was supplied without source with MDK-ARM with the source then being supplied with RL-ARM?
err, so the OPs RTX is different to the one of RL-ARM now is it?
and the link you provided has rl-arm embedded in it.
how stupid of me.
indeed.
indeed!
;)