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LPC17xx can't enter ISP mode

Hi,
I got this problem with my LPC1768. I was working on my project and tried to use PLL, but I set to big MSel and my LPC is not responding now. I'm programing through JTAG with H-Jtag but it reads only signature of uC and nothing else. I tried to enter ISP mode but it seems not to go into. I put line 2.10 low and reset but flash magic and lpc21isp don't get respond from it. I'm sure I using good lines and UART0. Can anybody help?

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  • Did you program any code read protect?

    Without code read protect, the ISP interface should always be avaiable and it doesn't care about any incorrect PLL configuration.

    If you have too high code read protect, then the boot loader will ignore the 2.10 state.

    Next thing - when experimenting with PLL or other things that may lock up the processor, you should try to wait until you reach main() and preferably have a bit of delay before the experiment code. That gives you a time gap where the JTAG interface may manage to catch the processor before it locks up.

    You can also try to step up the JTAG clock frequency to try to get the JTAG interface to be quicker to interact with the chip after it is released from reset to see if you have time enough to catch the processor. The PLL activation is two-step. First configure the PLL parameters and wait until the PLL gets a lock. First after the PLL lock will the code switch to actually use the PLL output frequency - at least if the PLL code is correctly written.

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  • Did you program any code read protect?

    Without code read protect, the ISP interface should always be avaiable and it doesn't care about any incorrect PLL configuration.

    If you have too high code read protect, then the boot loader will ignore the 2.10 state.

    Next thing - when experimenting with PLL or other things that may lock up the processor, you should try to wait until you reach main() and preferably have a bit of delay before the experiment code. That gives you a time gap where the JTAG interface may manage to catch the processor before it locks up.

    You can also try to step up the JTAG clock frequency to try to get the JTAG interface to be quicker to interact with the chip after it is released from reset to see if you have time enough to catch the processor. The PLL activation is two-step. First configure the PLL parameters and wait until the PLL gets a lock. First after the PLL lock will the code switch to actually use the PLL output frequency - at least if the PLL code is correctly written.

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