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quad rotor helicopter whith trilateral servo control mechanism

some one working with quadrotor helicopter ??
we are planning to build the same using a processor 51 series. but really speaking i am new to this programming and control.. if someone can help me it would be a real help..
i need the help even for the algorithm development..
if yo can give me code i would like.

we have brought a 6 degrees of freedom inertial measurement system from sparkfun dampening which has 3 axis accelerometer and 3 axis groscope..
but dont know how to use it for the stabilization..

our first phase is to make the helicopter stable in air.. the movement and control for motion will come in second phase only..
if someone can help i would be really thankfull..

thank you
xlove

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  • The SiLabs parts (among others?) both run at much higher clock rates and execute many more instructions in each clock cycle - so you have a multiplicative gain, and I wouldn't actually be surprised if it really is 100 times.

    some of this will be true for other SILabs chips, the below is solely based on the f12x/f13x

    No doubt Erik can give us the real numbers...

    YES, it runs 100 times faster
    a) 100 MHz clock
    b) instruction cycle = 1 clock as opposed to the traditional instruction cycle being 12 clocks.

    a caveat
    the flash (which appear as a regular 8bit flash) is 32bit wide with prefetch (appears as a cache), so when the code "runs linear" you do, indeed, have a 100 times (really ~90 times, see below) speed improvement. However when the code 'unlinearizes' (jmp) you get a penalty of a few cycles.

    The reason you have ~90, not 100 times the "linear speed" is that not all instructions take the same number of instruction cycles as the traditional did.

    All in all, my rough imprecise, experience based, number is that in actual applications it is about 50 times faster than a 12 MHz steam driven '51.

    The chip has some very elaborate cache configuration logic and, if properly applied the perfomance can be tuned to approach 85 times faster than a 12 MHz steam driven '51, this number is VERY application dependent.

    Erik

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  • The SiLabs parts (among others?) both run at much higher clock rates and execute many more instructions in each clock cycle - so you have a multiplicative gain, and I wouldn't actually be surprised if it really is 100 times.

    some of this will be true for other SILabs chips, the below is solely based on the f12x/f13x

    No doubt Erik can give us the real numbers...

    YES, it runs 100 times faster
    a) 100 MHz clock
    b) instruction cycle = 1 clock as opposed to the traditional instruction cycle being 12 clocks.

    a caveat
    the flash (which appear as a regular 8bit flash) is 32bit wide with prefetch (appears as a cache), so when the code "runs linear" you do, indeed, have a 100 times (really ~90 times, see below) speed improvement. However when the code 'unlinearizes' (jmp) you get a penalty of a few cycles.

    The reason you have ~90, not 100 times the "linear speed" is that not all instructions take the same number of instruction cycles as the traditional did.

    All in all, my rough imprecise, experience based, number is that in actual applications it is about 50 times faster than a 12 MHz steam driven '51.

    The chip has some very elaborate cache configuration logic and, if properly applied the perfomance can be tuned to approach 85 times faster than a 12 MHz steam driven '51, this number is VERY application dependent.

    Erik

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