• State Not Answered
  • Locked Locked
  • Replies 7 replies
  • Subscribers 21 subscribers
  • Views 4153 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

IWDG and NVIC_SystemReset on Keil MCBSTM32

M D

Hi all, I'm crossposting this from ST forum since i didn't get any response and the question is still open and becoming urgent in choosing the microcontrollore for our project.

I'm using the keil MCBSTM32 demoboard (F103RB micro) and I'm coding with the latest std_periph lib (V3.1.0 - 06/19/2009) with keil uVision 3 V3.85 and ULINK-Me.
The board is powered from both the usb cable and the ULINK (ULINK is not supposed to power the board, but I've seen that even if the main usb power cabe is diabled the board is powered with just the ULINK connected).

The indipendent watchdog doesn't seems to work properly if the debugger is running. All seems ok if the debugger and ulink are off. Why ???
From the board schematics, the NRST pin is connected to both the board reset button AND the jtag connector.

Also, in this unclear situation, the undocumented function NVIC_SystemReset (taken from some FLASH protection example) does not works (it seems to block on the while(1) infinite cycle waiting for reset after setting the NVIC_SYSRESETREQ bit.
Does this function relay on the IWDG to reset ?
Anyone with similar problem ?

Parents
  • 0

    Systemreset:
    Setting bit SYSRESETREQ to request an systemreset will only work at privileged mode. If you try to set this bit at unprivileged mode a hardfault ecxeption occurs.

    Watchdog:
    It is possible that the watchdog timer keeps running during debug stop. Please have a look to the STM32DBG.ini file and check the behaviour during debug stop.

Reply
  • 0

    Systemreset:
    Setting bit SYSRESETREQ to request an systemreset will only work at privileged mode. If you try to set this bit at unprivileged mode a hardfault ecxeption occurs.

    Watchdog:
    It is possible that the watchdog timer keeps running during debug stop. Please have a look to the STM32DBG.ini file and check the behaviour during debug stop.

Children
  • 0 in reply to Raphael L�ffel

    Hi Raphael,

    thnx for the reply but... I'm not sure I did undertsand correctly:

    1) Systemreset
    I do NOT change any privilege at startup, so the micro should start in thread/privileged mode, shouldn't it ?
    As a result, setting the SYSRESETREQ should cause a reset. Anyway, the debugger shows that the execution halts in the while(1); loop after bit set, and never enters the default HardFault_Handler.
    ??

    2) Watchdog
    I checked the STM32DBG.ini file and confirm that IWDG does NOT stop when core is haltded (i didn't stop anyway, debugger was just running).
    I also tried to switch to SW insted of JTAG and assigned an alternate GPIO function to jtag reset signal, but the behavior is the same.

    Any other hint ??