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Hello,
I want to comunicate two STR910 micros via SPI. One of them will be the master, and other the slave. The code is very simple:
[b]MASTER:[/b]
/* CLK, MISO & MOSI configuration */ SCU->GPIOOUT[3] &= 0xC0FF; SCU->GPIOOUT[3] |= 0x2200; SCU->GPIOIN[3] |= 0x20;
/* SPI1 configuration */ SSP1->CR0 = 0x0007; /* CPHA=0, CPOL=0 */ SSP1->CR1 = 0x0002; /* Master mode & SSP Enable */ SSP1->PR = 0xFE;
/* Send data */ for(i=0;i<20;i++) { SSP1->DR = 0x41; }
[b]SLAVE:[/b]
/* CLK, MISO & MOSI configuration */ SCU->GPIOOUT[3] &= 0xC0FF; SCU->GPIOOUT[3] |= 0x0800; SCU->GPIOIN[3] |= 0x40; SCU->GPIOIN[3] |= 0x10;
/* SPI1 configuration */ SSP1->CR0 = 0x0007; SSP1->CR1 = 0x0006; /* Slave Mode & SSP Enable */ SSP1->PR = 0xFE;
/* Receive data --> Status Register */ while((SSP1->SR & 0x04)==0); for(i=0;i<20;i++) { buf[i] = SSP1->DR; }
But I donÂ't receive anything. Which is the problem?
Thanks in advance.
I don't know your processor, but where did you specify the clock frequency for the master?
And your slave should not wait until the flag toggles and then expect to be able to pick up 20 bytes. If the status register says data is available, you should pick up one byte and then check again if more is available. Reading multiple characters is only allowed if the status flag you look at is a "RX FIFO full".
Another thing - are you sure the SPI slave can buffer 20 characters?
And when you send - are you sure that your TX FIFO (does it have a FIFO?) can store 20 characters for transmission? If not, then you must pace the transmission instead of just jamming 20 characters into the data register.
What have you done to debug? Have you looked at the MISO, MOSI and clock signals with an oscilloscope?
First of all, thanks.
I don't know your processor, but where did you specify the clock frequency for the master? PLL frequency is 38,4 MHz. With SSP1->CR0 and SSP1->SR resgister you can set de frequency of the SPI bus. In both cases values are the same.
And your slave should not wait until the flag toggles and then expect to be able to pick up 20 bytes. If the status register says data is available, you should pick up one byte and then check again if more is available. Reading multiple characters is only allowed if the status flag you look at is a "RX FIFO full". OK. I do the same sending only 1 byte. But the result is the same. I donÂ't receive anything. /***** MASTER: SSP1->DR = 0x41; /* Send data */ SLAVE: while((SSP1->SR & 0x04)==0); /* Receive data */ buf[i] = SSP1->DR; *****/
Another thing - are you sure the SPI slave can buffer 20 characters? Only 16. But I've changed and now I send only one byte.
What have you done to debug? Have you looked at the MISO, MOSI and clock signals with an oscilloscope? With the oscilloscope I can see that data byte is send by the master to slave. But slave donÂ't receive data.
I haven't seen any comment saying what bit rate you are configuring your SPI for.
Are you sure that the master is using a bit rate the same chip can support as a slave? Note that many SPI implementations have limitations on max bit rate for reception in comparison to the core frequency to make sure that the SPI receiver have time to sample the data at a proper interval before the master steps to the next bit.
What bit rate do you want to send with, and what bit rate does the oscilloscope say you are using. The bit rate is easiest to check on the clock line, since it always show one pulse/bit.
Have you measured the voltage swing on the MISO and MOSI signals? Have you connected them correctly so you haven't inadvertedly crossed the signal logic? MISO = Master In Slave Out. MOSI = Master Out Slave In.
Remember that SPI is two-way, so you always send in both directions. If you write data to your slave, that data will be sent to the master when the master initializes a transfer in the other direction.
And one very important thing: The slave-select. Do your master activate the slave-select input of the slave processor when you send data? If not, then the slave will ignore the SPI signals.