I'm having problems with 8051 based ISRs. The problem occures when:
1- Interrupt A is being serviced. 2- Interrupt B occures and is serviced (in the middle of ISR A execution. 3- Sometimes ISR A fails to complete.
I'm using the C ISRs used in C51 without any register set defined ("using xx"). My understanding is that the ISRs should get entered and serviced mutually exclusive from one another without corrupting one another's stack. Is this not the case?
Thanks for your comments. The problem turned out to be something very simple. Solution:
In Event B ISR, P_EPIRQ = 0x04; which clears the IRQ has to be done after EZUSB_IRQ_CLEAR(); which is the global IRQ. Otherwise unwanted nesting occures.
The question that no one answered was whether the IRQs generated by C51 are nestable. From above, apparently they are not since nesting causes immediate failure.
This is not a general 8052 question. This is an add-on that is specific to your Chip. The general 8052 rules do not fully apply.