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Hi all
We are developing product related to safety standards, where all the controller used ,peripheral used should pass through the safety test and self test to indicate they are working properly as per their configuration.
like data stored in the EEPROM is correct or not to know we can write the data into EEPROM with the normal data and then compliment it and store so that while reading we can compare the real data and the compliment to see if both are equal .this is the test for EEPROM, data can be lost while saving, reading ,transmitting so which can be checked by 2'complimenting the data and using it .
But how to check the peripherals like the timer ,clock ,interrupt,internal RAM,Flash are working properlly .
so that while power on this test has to be performed to indicate the controller is in good working condition otherwise fault and the it will not run
can any one give some idea how to go about it , it will be very helpful for me .
Regards Suresh
I'm not really sure if you mean testing of your software, or that the hardwaer is working ok.
The peripherials does normally not fail randomly. When talking about a uC, everything is expected to work, as long as you supply the correct voltages everywhere - and in the correct order.
For the peripherials, it is the pins that may fail, so it isn't a question of testing the internal device hardware, but to make sure that output signals may reach their expected values (with enough current drive/sink capacity) and that input signals may detect high and low inputs (without undue load).
The problem here is that to test these external signals, you normally have to add extra logic. You may have to add serial-in and serial-out shift registers, where you may sample a number of signals in the circuit, or drive test signals.
Extra external logic means that you suddenly get a number of extra solder points, PCB traces etc that may fail. In the end you may loose more than you gain. External signals are most likely to fail where they leave the PCB but if you add extra logic to monitor the signals, this extra logic is affected by the same ESD, overvoltages, reversed polarities, short-circuits etc...
In the end, you have to set up a test matrix, and decide what to do for each individual signal, IRR, data queue etc. For each item on the list, you may establish a probable cost to test the item, a probability of correctly detecting errors (and a probability of the test code/hardware breaking something or giving a false pass/fail), ...
In the end, it is better that you come back with more precise questions. Right now, you are asking a wild-card question, and not too many people are interested in trying to produce every possible answer that can match a wild-card question.