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startup code

Can anybody explain what is the meanig of the below statemnets? How to Use these handlers.

Undef_Handler   B       Undef_Handler
SWI_Handler     B       SWI_Handler
PAbt_Handler    B       PAbt_Handler
DAbt_Handler    B       DAbt_Handler
IRQ_Handler     B       IRQ_Handler
FIQ_Handler     B       FIQ_Handler

  • Looks like an interrupt vector table. According to ARM assembly language syntax, each line should mean

    label intruction_mnemonic instruction_operand
    


    So I assume these entries in the interrupt vector table are endless loops (branch to self).

    - mike

  • This are endless loop called for the interrupt vector address .
    This loops are called from the vector address with an instruction

    "LDR PC Undef_Addr"

    You can call your implementation by replacing the address / label in this instruction in your startup code.

    Suvidh