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Can a software memory management unit be implemented on a 8032 microcontroller ?
Why would you want to do that? Exactly what functionality do you want from this "memory management unit"? Try a search for "malloc" and "dynamic allocation" in relation to the C51 tools, and see all the previous discussions on this topic!
My project is on a MP3 player whose code size is 116kByte which is stored in a Nand Flash chip. Upon boot up, I would like to get only 32kB of 116kB into 8032's Program memory which is implemented as SRAM of size 32KB. I want to implement paging mechanism for getting 32KB blocks into 8032's PM as 8032 has no MMU support. So, i would like to know whether the same can be implemented on a 8 bit microcontroller.
You too, eh? http://www.keil.com/forum/docs/thread7445.asp Is this a class project?
Hi Neil. There must be some misunderstanding. This isn't a class project and I have no contact with the person who has posted thread 7445. I would like to know whether MMU concept can be inplemented on 8 bit controllers.
"This isn't a class project and I have no contact with the person who has posted thread 7445." You must admit, it's a big coincidence though, isn't it? "I would like to know whether MMU concept can be inplemented on 8 bit controllers." Of course it's possible - see the answer in the other thread. But is it sensible? Why not just load the entire code into SRAM and run from there, using "conventional" code banking? Or load into IAP Flash and, again, use "conventional" code banking? (whatever you do, all will need some sort of "trick" to write to CODE space).
http://www.keil.com/forum/docs/thread7340.asp http://www.keil.com/forum/docs/thread7413.asp
Hi Neil, Yeah 7445 was a real coincidence. It surprised me too. My project specification says " I have to get only 32KB code out of 116kB code into the 8032's PM". So, i can't use code banking here. I need to use a mechanism like paging to see that the code comes into the PM(SRAM) of 8032 in 32kB chunks only. Is it ok to implement mmu mechanism on an application like MP3 as I have read some articles on the net stating it holds good for only 32/64 bit controllers ? If yes, can u please suggest some links which could help me implement the same. What is IAP Flash ? Regards, Chetan
Ok Neil, I got what IAP Falsh is. Sorry
"Is it ok to implement mmu mechanism on an application like MP3" What exacly do you mean by, "an application like MP3"? Do you actually have the 8051 running the MP3 decoding algorithms? I'd have thought that was quite a challenge for an 8051 running directly from Flash without any code banking - let alone the paged scheme you're proposing!! :-0
Upon boot up, I would like to get only 32kB of 116kB into 8032's Program memory which is implemented as SRAM of size 32KB. This is uttely STUPID. what does virtual memory have over banking. You can get 2 Mbyte of fast enough for code memory flash for $2 or less. I would like to know what device that, together with the cost of code RAM required for "virtual" comes out cheaper. Not to mention the development costs involved. There is no reason than someones intent "I am going to show how smart I am". That this just makes you look dumb, you eveidently have not realized. OK, there is another possibility, Some individual has designed some hardware mindlessly craeting the design before even finding out what a '51 is. Erik
"You can get 2 Mbyte ... flash for $2 or less." Do you mean 2Mbit? That's still 256K bytes, though - plenty for this!
"You too, eh? ... Is this a class project?" Ah no, this is the one I was thinking of: http://www.keil.com/forum/docs/thread7324.asp So why did you start a new Thread on the same question?
nope, 2 Mbyte 16 Mbit http://www.sst.com/products.xhtml/parallel_flash/39/x8/SST39VF1682 Ok, it is not $2 it is $2.63 Erik
In theory, I'm sure you could run an MMU with an 8051. In practice, a typical MMU implementation is huge compared to the entire 8051. (The ARM7 MMU, for example, is about the same size as the ARM7 core plus its instruction and data caches.) I doubt anyone ever built an 8051 derivative with an MMU. It wouldn't make much sense. Given the gate count of the MMU, you might as well go ahead and make the processor core larger. Sounds more like you want to overlay code. The usual 8051 banking mechanism would do. You'd write custom banking routines to copy the new bank into SRAM. Performance will be very slow, so you'll need to be very careful to organize your program in relatively discrete overlays that interact very little. I wouldn't expect you could afford to copy 16KB of data on every function call.
Hi Neil, Iam using a SOC with an inbuilt 8032 and DSP. Currently, it is running an MP3 application and definitely code banking is done. My client wants me to design the application such that only 32kB code is executed at a time. He wants to replace the 8032's 128kB SRAM with a 32KB SRAM in his future design. So, that's the task.
Sorry Neil, Previous thread responses were more related to code banking. Since, code banking won't work for the design Iam in search of, i thought maybe I would get help on implementing the same using MMU concept.