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Code Banking

This is an MP3 Player application.
I have a code of size 116k, which resides in the Program memory (On Chip -SoC with in built 8032 & DSP) upon boot up.
This code initially resides in a external Nand Flash memory chip alongwith DSP code
as an image file (Size:4mb).
Once the system is On, the image file is parsed. I mean 116k of 8032 code is sent to 8032 Program memory and the DSP code to DSP's Program memory.

I would like only 32k of 116k code to reside in the Program memory upon boot up.

Please kindly suggest a method of doing the same.

Can code banking be done ? If so how ?

Parents
  • My project aim is to use only 32k of Program
    memory of 8032 of the present 128k. The 128k Program memory (SRAM) will be replaced by a 32k SRAM after this project is successful.
    Presently,once the system is On, the 116k of 8032 code resides in the 128k Program memory of 8032 and code banking is done.
    (For this the L51_BANK.a51 file is used in which ?B_NBANKS is set as 2.

    So,does this mean that there are two code banks (Bank0 & Bank1)?Also does it include the common code(area)?

    Also the hardware for code banking exists.
    I have thought of a method:
    AFTER THE SYSTEM IS POWERED ON, THE BOOT
    LOADER WILL INITIALIZE THE PERIPHERALS
    AND DO PARSING.
    THE PARSING SHOULD BE SUCH THAT DSP CODE MUST RESIDE IN DSP'S PM , 8032 CODE OF 32K
    (OUT OF 116K) MUST RESIDE IN THE 128k, 8032'S PROGRAM MEMORY. THE REMAINDER PART OF 8032's 116K CODE WILL RESIDE IN THE NAND FLASH(size:128M x 8) ITSELF after PARSING.

    Please kindly suggest whether this method will do. or is there any other way out.

Reply
  • My project aim is to use only 32k of Program
    memory of 8032 of the present 128k. The 128k Program memory (SRAM) will be replaced by a 32k SRAM after this project is successful.
    Presently,once the system is On, the 116k of 8032 code resides in the 128k Program memory of 8032 and code banking is done.
    (For this the L51_BANK.a51 file is used in which ?B_NBANKS is set as 2.

    So,does this mean that there are two code banks (Bank0 & Bank1)?Also does it include the common code(area)?

    Also the hardware for code banking exists.
    I have thought of a method:
    AFTER THE SYSTEM IS POWERED ON, THE BOOT
    LOADER WILL INITIALIZE THE PERIPHERALS
    AND DO PARSING.
    THE PARSING SHOULD BE SUCH THAT DSP CODE MUST RESIDE IN DSP'S PM , 8032 CODE OF 32K
    (OUT OF 116K) MUST RESIDE IN THE 128k, 8032'S PROGRAM MEMORY. THE REMAINDER PART OF 8032's 116K CODE WILL RESIDE IN THE NAND FLASH(size:128M x 8) ITSELF after PARSING.

    Please kindly suggest whether this method will do. or is there any other way out.

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