I am trying to use uVision and C51 with a Cast R80515 core that runs on an asic chip. I am having problems with my dual data pointer setup. The device database contains an entry for Cast R80515. This device entry lists MOD517DP on the CPU line, which tells the compiler to use Infineon's setup of multiple data pointer registers. However, this setup is not compatible with the core that I am using. MOD517DP seems to be geared for chips that have 8 data pointer registers. I only have two DPTR registers. How do I configure the device database to work with my core? Here is a summary of my register set DPL = 0x82 DPH = 0x83 DPL1 = 0x84 DPH1 = 0x85 DPS = 0x92 (LSB) I noticed that C51 supports dual datapointers for atmel, philips, and dallas cores, but none of those have DPS at 0x92. Is there a way to configure my device database to support the dual data pointer registers in my core? H^2