This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

STEVAL-IDB008V2 ST-LINK/v2 communincation error using Keil uVision5

Hi,

I am having issues debugging my STEVAL-IDB008V2 board using the ST-LINK/v2 debugger through Keil v5. When I try to load the program in Keil, I get the error message: ''No target connected'' or the error message ''Error while accessing a target ressource. Ressource perhaps not available or a wrong access was attempted''.

I am able to connect to the board using the BlueNRG-1 ST-LINK Utility.

What I tried so far:

-Erase the chip before loading the program
-Loading the program when the board runs the bootlader (DI07 set HIGH, DL2 ON)
-Loading the program when the board runs the flash application (DI07 set LOW, DL2 OFF)
-Loading the program when the board is in DFU USB (RESETIN set LOW, DL2 flashes)
-Loading the program with different debug settings (Normal, with Pre-reset, under Reset) and clock settings
-Updating the FW of the ST-LINK/V2

My current settings for the Debug tab:

Debug Adapter: ST-LINK/V2 Serial Number: 50FF71067871515218580667 Version HW: v2 Version FW: V2J32S7

Target Com: Port SW Clock Req: 1.8MHz Clock Selected: 1.8Mhz

Debug: Connect & Reset Options: Connect: Normal Reset: Autodetect Reset after Connect (checked)

Cache Options: Cache Code(checked) Cache Memory(checked)

Download Options: Verify Code Download (unchecked) Download to Flash (unchecked)

SW Device: ID CODE: 0x0BB11477 Device Name: ARM CoreSight SW-DP

Furthermore, as you can see from the debug settings, the ST-LINK/V2 is recognized in Keil and Keil identifies the BlueNRG-2 as 0x0BB11477 (IDCODE)/ ARM CoreSight SW-DP (Device Name).

Any help would be much appreciated.

Cheers,
Xavier

Parents
  • Hi there,

    Thank you for answering.

    I am currently testing on the example project "ADC_Polling" from the BlueNRG1_Periph_Examples found in the BlueNRG-1_2 DK which from my understanding does not go into Low Power Mode (no reference is made to any BlueNRG_Sleep commands in the code).

    I checked the download and verify options, and I still was not able to load or debug in Keil.

    As for the ST-LINK debugging, if you are referring to the "Core Panel", I am indeed able to read the core registers and to step into the program.

    Any more help would be greatly appreciated.

    Cheers,
    Xavier

Reply
  • Hi there,

    Thank you for answering.

    I am currently testing on the example project "ADC_Polling" from the BlueNRG1_Periph_Examples found in the BlueNRG-1_2 DK which from my understanding does not go into Low Power Mode (no reference is made to any BlueNRG_Sleep commands in the code).

    I checked the download and verify options, and I still was not able to load or debug in Keil.

    As for the ST-LINK debugging, if you are referring to the "Core Panel", I am indeed able to read the core registers and to step into the program.

    Any more help would be greatly appreciated.

    Cheers,
    Xavier

Children