Adjust Duty Cycle and Frequency with Timmer

Hi, my question is I would like to create pulse using timmer. The period of duty cycle and period using timmer only. I am using arm assembly. My sample code is. This code generates a pulse with a %50 percent duty cycle.

setup code for timer0

AREA Program, CODE, READONLY ARM ;use ARM instruction set INCLUDE LPC23xx.inc ; MMR definitions EXPORT timer0_init

timer0_init ; R0, R1, and R2 are all used in this subroutine to initialize the timer ; Since these registers don't need to return any values to main, they should ; be placed on the stack STMIA SP!, {R14, R0, R1, R2}

; refer to chapter 23 of the user manual (page 554) for timer information

; First step is to set bit 1 of the PCONP (power control for perihperals) register LDR R0, =(PCONP) ; puts address into R0 LDR R2, [R0] ; gets the value inside the PCONP address and stores it in R2 LDR R1, =0x2 ; R1 now has a value of 1 at bit 1 ORR R2, R2, R1 STR R2, [R0]

; second step is to setup P1.28 as an external match for timer0 (check page 160) ; So bits 24 and 25 must be set to 1 LDR R0, =(PINSEL3) LDR R2, [R0] ; contents of PINSEL3 now in R2 LDR R1, =0x3000000 ; contains a 1 at bits 24 and 25 ORR R2, R2, R1 STR R2, [R0]

; third step is to disable the onboard resistor for P1.28 ; reference pages 155 and 167-168 LDR R0, =(PINMODE3) LDR R2, [R0] ; contents of PINMODE3 now in R2 LDR R1, =0x2000000 ; contains a 1 at bit 25 and a zero at bit 25 ORR R2, R2, R1 STR R2, [R0]

; fourth step is to setup the match control register ; when the Timer Counter matches the Match Register, we need to ; -- reset the Timer Counter (bit 1 on page 559) LDR R0, =(T0MCR) LDR R2, [R0] LDR R1, =0x2 ; contains a 1 at bit 1 ORR R2, R2, R1 STR R2, [R0]

; Modify the Timer Control Register (page 556-557) ; Enable the Timer Counter by putting a 1 in bit 0 LDR R0, =(T0TCR) LDR R2, [R0] LDR R1, =0x1 ; contains a 1 at bit 0 ORR R2, R2, R1 STR R2, [R0]

; modify the Count Control register (page 557 -- 558) ; NOTE: We want the Timer Counter to increment on each rising clock edge and this is already default setting

; put zero into the Prescale Counter register (page 558) ; This will increment the timer counter each time the Prescale regiseter = 0 LDR R0, =(T0PC) LDR R2, [R0] LDR R2, =0x0 STR R2, [R0]

; Set the value of the Match Register (page 558) LDR R0, =(T0MR0) LDR R2, [R0] LDR R2, =6000000 ; after this many clock cycles, the LED will toggle STR R2, [R0]

; setup the functionality of the external match register (page 561) ; This controls the output of P1.28 ; We want the pin to toggle so modify bits 4 and 5 accordingly LDR R0, =(T0EMR) LDR R2, [R0] LDR R1, =0x30 ; contains a 1 at bits 4 and 5 ORR R2, R2, R1 STR R2, [R0]

exit

LDMDB SP!, {PC, R0, R1, R2}

END