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I am using a NXP LPC11U68 (Cortex M0+).
Specific to the WDT oscillator, why does the KEIL start-up library define different oscillator frequencies than NXP data-sheet.
Keil's 'startup_LPC11U6x.c:
/* Determine clock frequency according to clock register values */ switch ((LPC_SYSCON->WDTOSCCTRL >> 5) & 0x0F) { case 0: oscClk = 0; break; case 1: oscClk = 500000; break; <* 0.5 MHz *> case 2: oscClk = 800000; break; <* 0.8 MHz *> case 3: oscClk = 1100000; break; <* 1.1 MHz *> case 4: oscClk = 1400000; break; <* 1.4 MHz *> case 5: oscClk = 1600000; break; <* 1.6 MHz *> case 6: oscClk = 1800000; break; <* 1.8 MHz *> case 7: oscClk = 2000000; break; <* 2.0 MHz *> case 8: oscClk = 2200000; break; <* 2.2 MHz *> case 9: oscClk = 2400000; break; <* 2.4 MHz *> case 10: oscClk = 2600000; break; <* 2.6 MHz *> case 11: oscClk = 2700000; break; <* 2.7 MHz *> case 12: oscClk = 2900000; break; <* 2.9 MHz *> case 13: oscClk = 3100000; break; <* 3.1 MHz *> case 14: oscClk = 3200000; break; <* 3.2 MHz *> case 15: oscClk = 3400000; break; <* 3.4 MHz *> }
NXP's datasheet/example code:
typedef enum CHIP_WDTLFO_OSC { WDTLFO_OSC_ILLEGAL, WDTLFO_OSC_0_60, /*!< 0.6 MHz watchdog/LFO rate */ WDTLFO_OSC_1_05, /*!< 1.05 MHz watchdog/LFO rate */ WDTLFO_OSC_1_40, /*!< 1.4 MHz watchdog/LFO rate */ WDTLFO_OSC_1_75, /*!< 1.75 MHz watchdog/LFO rate */ WDTLFO_OSC_2_10, /*!< 2.1 MHz watchdog/LFO rate */ WDTLFO_OSC_2_40, /*!< 2.4 MHz watchdog/LFO rate */ WDTLFO_OSC_2_70, /*!< 2.7 MHz watchdog/LFO rate */ WDTLFO_OSC_3_00, /*!< 3.0 MHz watchdog/LFO rate */ WDTLFO_OSC_3_25, /*!< 3.25 MHz watchdog/LFO rate */ WDTLFO_OSC_3_50, /*!< 3.5 MHz watchdog/LFO rate */ WDTLFO_OSC_3_75, /*!< 3.75 MHz watchdog/LFO rate */ WDTLFO_OSC_4_00, /*!< 4.0 MHz watchdog/LFO rate */ WDTLFO_OSC_4_20, /*!< 4.2 MHz watchdog/LFO rate */ WDTLFO_OSC_4_40, /*!< 4.4 MHz watchdog/LFO rate */ WDTLFO_OSC_4_60 /*!< 4.6 MHz watchdog/LFO rate */ } CHIP_WDTLFO_OSC_T;