I have problems with startup file, in this article http://www.keil.com/support/docs/2263.htm keil suggest that STARTUP.A51 should be last file in the project (should be linked as last) But in my project, when STARTUP.A51 is on any other position than first, it cause problems which make my uC reset few times per hour.
Does anybody had such a problem?
I'm using: IDE-Version: µVision V4.60.6.10 Toolchain: PK51 Prof. Developers Kit for SiLabs Version: 9.51
Best regards, Marcin
Yes, there is a code that reserve space in memory, set CRC value and flash protection.
CSEG AT 17FEh ProgCRC: DW 4D67h // conf memory CSEG AT 1800h ConfMem: DS 1024 CSEG AT 1DFFh FlashProtection: DB (~(12)) // First 6KB locked -> 12 pages, 512B each CSEG AT 1E00h ReservedFlash: DS 512 // last page of flash END
The above code is located in separate .a51 file that is linked as last file, in the configuration which behave correct (where Startup.a51 file is linked as first).
which chip?
I would be inclined to take a close look at the map files and in particular check the differences between working and failing.
Zeusti
It's a Silicon Labs C8051F353.
15.1.1. Flash Lock and Key Functions Flash writes and erases by user software are protected with a lock and key function. The Flash Lock and Key Register (FLKEY) must be written with the correct key codes, in sequence, before Flash operations may be performed. The key codes are: 0xA5, 0xF1. The timing does not matter, but the codes must be written in order. If the key codes are written out of order, or the wrong codes are written, Flash writes and erases will be disabled until the next system reset. Flash writes and erases will also be disabled if a Flash write or erase is attempted before the key codes have been written properly. The Flash lock resets after each write or erase; the key codes must be written again before a
so, when
CSEG AT 1DFFh FlashProtection: DB (~(12)) // First 6KB locked -> 12 pages, 512B each
get written, to memory you are hosed as far as writing the rest of your code