#include<reg51.h> void delay() //Function to provide a time delay of approx. 1 second. Timer 1. { int i; for(i=0;i<20;i++) { TL1=0xFD; TH1=0x4B; TR1=1; while(TF1==0); TR1=0; TF1=0; } } void main() { char num[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x67};// Hex values corresponding to digits 0 to 9 int c; while(1) { for(c=0;c<10;c++) { P1=num[c]; delay(); } } }
Hi guys, I am not getting delay of 1 sec.blinking rate of 7 segment is too fast in comparison of delay calculated(=1sec). Any help will be appreciated.. thanks
Hi Abass,
I did one of these delays. and i am very good at them.
You are running at 11.95MHz Crystal. or 7.213MHz?
Did you consider including the hydrodifferential inductocapacitive deviation value in your calculation.
If you can't do that, why not give us the formula you use for the calculation.
I just used the formulae given in MAZIDI . Convert the hexadecimal value to decimal and then subtract with 65536 and then multiply with 1.085 to get exact delay. Crystal frequency used is 11.95MHz
What delay are you getting?
and then multiply with 1.085 to get exact delay.
C'mon mate, tell us where the 1.085 comes from.
Convert the hexadecimal value to decimal and then subtract with 65536
WTF is the hexadecimal value? And I don't mean the actual value you use, I mean what does the value represent?
If YOU can answer these, you'll be one step closer to understanding what you've got wrong.
Hi, Using 11.0812MHz Crystal and P89V51RDFN2 uC unit. Using it in 1/12 clock cycle mode so that 1/12 of 11.0592 is one T state. For it 1/12 * 11.0592 is effective clock. Which is 12/11.0592= 1.085us in time domain. and for one second delay, a loop of 20 iterations with each iteration of approximately 50000us is calculated as 50000/1.085=46080 or for approx calculations 46083 and for time with this delay initialization id done at 65535-46083+1=19453 (+1 u can understand, if not leave it its very small since we are talking about 1 second not milliseconds). What we didn't get here guys?
Where do you set up the TIMER/COUNTER MODE CONTROL REGISTER?
here we go again
WHICH CHIP? (8051 can mean a lot of things these days)
Hi P Krater, Thanks for the reply. You correctly mentioned it wasn't done earlier. The TMOD=0x10; is now set to be used in mod 1 timer 1. But still the counter is very fast.
But still the counter is very fast.
And you still fail to tell us how fast !!! It's not rocket science to determine that, even if you don't have access to (something like) a scope.
Anyway, looking at the datasheet for your variant of the 8051 (P89V51RDFN2), it states that the timer is fed by Osc/6. The traditional 8051 was fed by Osc/12. If that's correct, then there is a halving of delay.
Reading data sheets is very useful - As is understanding what the magic formulae in documents actually consists of.
haha yes it is nearly double. but i think u read the datasheet incorrectly as the default mode is to use in 1/12 of clock freq.(when we don't set the bit to use the timer in 1/12 crystal frequency mode, and this bit is set using the programmer, I use flashmagic, or IAP). For using it in 1/6 clock mode you have to set the bit using programmer. bit is: EDC bit of FST register, in case you ask which bit.
yes it is nearly double.
Nearly double? Nearly? WTF?
but i think u read the datasheet incorrectly ...
I'm looking at the document http://www.keil.com/dd/docs/datashts/philips/p89v51rd2.pdf
Figure 8 on page 27.
If you're getting double then it supports my suggestion ... Unless you've actually looked at a datasheet and discovered something more plausible yourself???
Not so sure the following text should be ignored:
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one can think of it as counting machine cycles. Since a machine cycle consists of six oscillator periods, the count rate is 1/6 of the oscillator frequency.
Above from chapter 7.3 of P89V51RD2 datasheet.
In the original post, we did not get to know the actual processor. We did not get to know the oscillator frequency. We did not get to know the used formula.
Not so easy to help if we don't get enough information.
I just used the formulae given in MAZIDI .
Mazdi refer to the old steam driven processors and thus Mazdi info should be taken with a BIG grain of salt when using modern processors.
per above my guess is that yur delay is 1/2 what you expect
Yes, that is how I interpret the details.
I don't understand how/why the OP changed my original talk of halving the delay and replied with the:
Must be one of those cases where I read it as I wanted to see it in my following response.
My favorite was the OPs statement:
As if he'd been reading and understanding it beforehand (faceslap)
I'm also referring the same document
Figure 8 on page 27
did u directly jump to this page or you had a brief look at first page first line also.
If you're getting double then it supports my suggestion ...
Or you are just finding something to support your argument? If you have frustration keep it to yourself don't show me. got it.
Now see first page second paragraph. A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to beneï¬t from this feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI.
And I think before going to find something relevant at page 34, 7.12.2 you stopped at Figure 8 on page 27 Clock doubling option By default, the device runs at 12 clocks per machine cycle (x1 mode). The device has a clock doubling option to speed up to 6 clocks per machine cycle (please see Ta bl e 5 8 ). Clock double mode can be enabled either by an external programmer or using IAP. When set, the EDC bit in FST register will indicate 6 clock mode.
When set, the EDC bit in FST register will indicate 6 clock mode. and only when set !! otherwise default.. u might hv read! o but might hv nt undrstood, bt i cnt do anythng about tht.
You are looking at text of how to run instructions at twice the speed.
But why not jump to the chapter about the timer? It does mention the use of a div-6 clock.
And when you test - does your test match the timer chapter or the instruction speed information?
Using 11.0812MHz Crystal and P89V51RDFN2 uC unit. Using it in 1/12 clock cycle mode so that 1/12 of 11.0592 is one T state. For it 1/12 * 11.0592 is effective clock. Which is 12/11.0592= 1.085us in time domain.
So is it 11.0592 MHz, 11.0812 MHz or 11.95 MHz? Pick what the board is actually using for consistencies sake.
How are you related to the OP?
The 1.085us math only works for the 11.0592 MHz, not for the 11.95 MHz