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Timer interrupt handlers in LPC1768

Sanket Sharma

I have written the following code to generate the interrupts whenever the corresponding MatchRegister0 of Timers 0 and 1 matches up the value of Timer Counter.

#include "lpc17xx.h"

#define SBIT_CNTEN   0
#define SBIT_MR0I    0
#define SBIT_MR0R    1
#define SBIT_MR1I    3
#define SBIT_MR1R    4
#define SBIT_CCLK    1u



int main (void)
{

  SystemInit();
  LPC_PINCON->PINSEL4 = 0x00000000;
  LPC_PINCON->PINSEL3 = 0x00300000;
  LPC_GPIO2->FIODIR = 0xffffffff;
  LPC_GPIO2->FIOPIN=0X00000000;

  LPC_SC->PCLKSEL0|= (SBIT_CCLK<<2) | (SBIT_CCLK<<4);

        LPC_TIM0->MCR  = (1<<SBIT_MR0I) | (1<<SBIT_MR0R);
  LPC_TIM0->PR=0X00017700;        //TIMER 0 CONFIGURATION//
        LPC_TIM0->MR0=0X00001388;
  LPC_TIM0->TCR  = (1 <<SBIT_CNTEN);
        NVIC_EnableIRQ(TIMER0_IRQn);


        LPC_TIM1->MCR  = (1<<SBIT_MR0I) | (1<<SBIT_MR0R);
        LPC_TIM1->PR=0X00017700;
        LPC_TIM1->MR0=0X00002710;              // TIMER 1 CONFIGURATION//
  LPC_TIM1->TCR  = (1 <<SBIT_CNTEN);
        NVIC_EnableIRQ(TIMER1_IRQn);

        while(1)
        {

        }

}



void TIMER0_IRQHandler(void)
{

LPC_GPIO2->FIOPIN= (1<<0);
}

void TIMER1_IRQHandler(void)
{
LPC_GPIO2->FIOPIN= (1<<3);
}

I want to know that how can I define multiple interrupt handlers for the same timer ?
For eg. If I want to generate the corresponding timer interrupts upon matching of values stored in that of MR0 and MR1 with that of Timer counter of Timer0, how can I do that ?

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  • 0

    The processor maps one interrupt handler per device. So you can't have multiple ISR for one timer device. You need to look at the event flags to figure out which event(s) that trigged the timer interrupt.

    Each of the match registers have their own flag, so it's trivial to check the interrupt reason and then clear that specific source before exiting the ISR.

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  • 0

    The processor maps one interrupt handler per device. So you can't have multiple ISR for one timer device. You need to look at the event flags to figure out which event(s) that trigged the timer interrupt.

    Each of the match registers have their own flag, so it's trivial to check the interrupt reason and then clear that specific source before exiting the ISR.

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