How to load application code directly to sdram.

You'd likely need to make a debugger script (.INI) which initializes the pins, the memory controller and the SDRAM, and then LOAD %L to code into the memory. Uncheck "Load Application at Startup", and point to the initialization file.

Several of ATMEL boards have DebugInSDRAM.ini type examples.

Thank You Pier Sorry for late Response.

1) I'm not getting this --> LOAD %L to code into the memory

2) I'm Refereeing Blinky_led program given in KEIL ATMEL software package.They have given .ini file for both internal RAM and EXT. SDRAM. as you said In the .INI file of the Ext.SDRAM they are the initialized the Pins and Ext.SDRAM ,Now I wanted to load my blinky led application code directly to SDRAM. I Uncheck "Load Application at Startup", and point to the initialization file.

3) Similarly i not able load my led application code internal RAM also.

I'm getting FLASH DOWNLOAD FAILED ERROR when i'm going to Downlod the code.

------------------------------------------------------------------------------->>>>>>>

Rebuild target 'SAM9X35 Ext SDRAM'
assembling SAM9X35.s...
compiling Blinky.c...
linking...
Program Size: Code=868 RO-data=40 RW-data=4 ZI-data=204
".\Ext_SDRAM\Blinky.axf" - 0 Error(s), 0 Warning(s).
Load "C:\\Users\\Tejas\\Desktop\\blinky_led\\Blinky\\Ext_SDRAM\\Blinky.axf"
ProjectFile = C:\Users\Tejas\Desktop\blinky_led\Blinky\JLinkArm_SAM9X35 Ext SDRAM.ini
Device = SAM9X35
Info: Device "AT91SAM9X35" selected (0 KB flash, 0 KB RAM).
VTarget = 3.293V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152152: ICache: 16kB (4*128*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152152: ICache: 16kB (4*128*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
DLL version V4.62, compiled Jan 25 2013 15:19:47
Firmware: J-Link ARM V8 compiled Aug 26 2015 15:08:21
Hardware: V8.00
Hardware-Breakpoints: 2
Software-Breakpoints: 8192
Watchpoints: 0
Found 1 JTAG device, Total IRLen = 4: Id of device #0: 0x0792603F
ARM9 identified.
JTAG speed: 1000 kHz
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152152: ICache: 16kB (4*128*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
Using adaptive clocking instead of fixed JTAG speed.
Include "C:\\Users\\Tejas\\Desktop\\blinky_led\\Blinky\\Clock.ini"
/******************************************************************************/
/* Clock.ini: Initialize clock to Main Oscillator clock */
/******************************************************************************/
// <<< Use Configuration Wizard in Context Menu >>> //
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2010 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
DEFINE LONG PMC;
PMC = 0xFFFFFC00;
_WDWORD(PMC+ 0x20, 0x01370701); // CKGR_MOR: Enable main oscillator
_sleep_(200); // Wait for stable Main Oscillator
_WDWORD(PMC+ 0x80, 0x00000001); // PMC_PLLICPR: Charge Pump Current
_sleep_(200); // Wait for stable Main Oscillator
_WDWORD(PMC+ 0x28, 0x202A4601); // CKGR_PLLAR: Configure PLL A
_sleep_(200); // Wait for stable Main Oscillator
_WDWORD(PMC+ 0x30, 0x00000010); // PMC_MCKR: PRES field
_sleep_(200); // Wait for Main Master Clock ready
_WDWORD(PMC+ 0x30, 0x00000212); // PMC_MCKR: all fields
_sleep_(300); // Wait for Main Master Clock ready
No Algorithm found for: 20000000H - 2000038FH
Erase skipped!