I'm wrapping up some product code on a modern 8051.
I actually surprised myself, because I ran out of memory in the data area.
I need to check with the manufacturer because supposedly this chip has 256 bytes of RAM in both the IRAM and XDATA. I have to dig through the device setup files from the manufacturer, because it isn't like an ARM where you specify the address ranges in KEIL directly.
I understand legacy 8051s had an external memory source in some cases, that you could access using the XDATA syntax. I understand the architecture issue to a degree since I've been building a mock 8 bit MCU in Verilog.
On a contemporary 8051, is it really that big of a performance to use XData area for variables?
Am I correct this is really a micro-optimization in terms of system gain? Like fractions of microseconds (µs) difference, or is it worse?
Yeah, I agree at 32MHz the system should be at optimal current consumption with idling... the electrical characteristics of the MCU state the same.
I actually started with the core running at 32MHz.
For some reason with this particular task and whatever overhead comes with the MCU coming out of idle, it turned out that running the MCU at 8MHz + Idling resulted in an improvement of current consumption around 0.4mA vs running the same task at 32MHz + Idling.
(So I got to re-wire all the interrupt timing, always fun).
I can't even start to speculate why this is the case, but the measured results are definitely valid.
I posted this line of thought on StackExchange actually for Cortex M. Mixed bag it seems for other users in terms of their testing. It seems most cases "burst processing" is optimal.
I remember reading an APP note from Microchip for Power Tips, and they called out burst processing vs. reducing clock speed. The conclusion was "it depends"