hi all... i am working on a project where i have to use SMD 44 pin TQFP SST89E516RD2 microcontroller. i am using TTL converter to program this controller using RX and TX pins. but i am not able to program the controller. i am using flash magic to program. when i press start button from the software it says RESET TO ENTER ISP MODE. but when i reset the controller, nothing happens. i have checked all the connection and also the connectivity. connected RX pin to controller TX pin and TX to controller RX pin. also only TX led glows in TTL converter. i tried changing around 4 boards but non of them are working. but the same if i try programming the DIP package, it programmes without any error.
I have gone through the datasheet, where it stats that external ossilator is put to off and internal ossicalator is put to use while programming. A Part of the datasheet has been attached.
In-Application Programming Mode The device offers either 72 KByte of in-application programmable flash memory. During in-application programming, the CPU of the microcontroller enters IAP mode. The two blocks of flash memory allow the CPU to execute user code from one block, while the other is being erased or reprogrammed concurrently. The CPU may also fetch code from an external memory while all internal flash is being reprogrammed. The mailbox registers (SFST, SFCM, SFAL, SFAH, SFDT and SFCF) located in the special function register (SFR), control and monitor the device’s erase and program process. Table 14 outline the commands and their associated mailbox register settings.
In-Application Programming Mode Clock Source During IAP mode, both the CPU core and the flash controller unit are driven off the external clock. However, an internal oscillator will provide timing references for Program and Erase operations. The internal oscillator is only turned on when required, and is turned off as soon as the flash operation is completed.
Memory Bank Selection for In-Application Programming Mode With the addressing range limited to 16 bit, only 64 KByte of program address space is “visible” at any one time. As shown in Table 13, the bank selection (the configuration of EA# and SFCF[1:0]), allows Block 1 memory to be overlaid on the lowest 8 KByte of Block 0 memory, making Block 1 reachable. The same concept is employed to allow both Block 0 and Block 1 flash to be accessible to IAP operations. Code from a block that is not visible may not be used as a source to program another address. However, a block that is not “visible” may be programmed by code from the other block through mailbox registers. The device allows IAP code in one block of memory to program the other block of memory, but may not program any location in the same block. If an IAP operation originates physically from Block 0, the target of this operation is implicitly defined to be in Block 1. If the IAP operation originates physically from Block 1, then the target address is implicitly defined to be in Block 0. If the IAP operation originates from external program space, then, the target will depend on the address and the state of bank selection.
IAP Enable Bit The IAP enable bit, SFCF[6], enables in-application programming mode. Until this bit is set, all flash programming IAP commands will be ignored.