Hi
i'm working with SAM3 microcontroller with 12MHz external crystal and set the multiplier and divider to have 64MHz for Master Clock then i see mistake when code is running
it's necessary noted that boundary condition for SAM3S is 64MHz for master clock does it have relation to this parameter and should this condition satisfy at all cost
Thanks for the reply, sorry I've made a mistake in my post and wrote the wrong configured value for PLLA divider. the configured value is not 2 it is configured to be 3 and multiplier is 31 as the datasheet indicates the PLL output clock will be: ((MUL+1)* PLL input) / DIV no +1 for DIV so my PLL output is : ((31+1) * 12) / 3 32*4 = 128
and as for master clock source is PLLA & prescaler is clock/2 so my master clock is 128/2 = 64 MHz
and as for VCO, I think you are referring to the internal oscillator. Am I right? If this is the case then I think it must be irrelevant to my problem because I am using the external oscillator as PLLA source.
As I said the MCK frequency seems to be configured correctly. so if you agree please read the rest of the description.
The problem is not the speed or frequency I see. I did not even think of measuring the MCK. The problem I encounter is here: I have a simple cryptographic algorithm (namely DES) being executed in my main loop (this is a test program that shows the board error).
In case you are not familiar with cryptography, let me explain that the algorithm transforms a plain input message to a ciphered message using an encryption key. if the key and the message are the same then the same encrypted result should be output each time you execute the algorithm.
in my main loop, I repeatedly compute the DES output for a specific key and input. At first the results do match but as time passes the result mismatches, causing my main loop to break and turning on an LED as failure indicator. My analysis to this point has given the below observations: 1.Some micro-controllers fail but some do not fail this test. 2.MCK frequency is a sensitive parameter in this test. micro-controllers that fail with MCK = 64 will not fail with lower frequency like 55 MHz. 3.If i heat up the hardware board using a hot air blower the micro controller fails sooner (the temperature was measured during heating up and it was in the operational temperature range, <85 degrees of centigrade). and if I lower the board temperature artificially the failure will not occur.
I know I posted too much information. I wait for you to read this then I will give more information as you want.
>>and as for VCO, I think you are referring to the internal oscillator. Am I right?
No, I'm talking about a VCO, not an RC oscillator, how do you think PLL's works, magically pulling a higher frequency out of the air? How does a frequency "multiplier" work?
Perhaps you should be discussing the failure of the ATMEL part, with ATMEL? This isn't a Keil issue, go find an FAE.
I'd verify the frequency, and check on any external PLL filter circuits, supplies, and bulk capacitance.
I use an external crystal oscillator with 12 MHZ output. This is the source of my PLL. Ok. I will check the PLL related issues as you said.
But the failure is discussed with Atmel. they've done all sorts of 'I don't exactly understand' tests and answered the parts and our hardware boards were ok and passed all the tests.
So I think the problem should reside in configuration. The problem is really complicated. So I will be glad if you can answer one basic question.
Is configuring a micro-controller at max frequency for master clock wrong? is it discouraged? Or the maximum stated frequency is safe to use at any condition? (considering wait states and other limitations)
Unless there is an errata, then the frequency should be supported for the full temperature range and all other conditions.
The basic exception is that a processor might support a rather wide voltage span. And then there might be multiple maximum frequencies specified in the datasheet depending on which voltage range it is operating in.
But the operating frequency, number of rewrites of the flash memory is basically worst-case guarantees where the devices are expected to have enough safety margins.
Thanks for your help Per