concerning OTG_FS_GRSTCTL_TXFFLSH. the stm32 reference Manual states "The application must write this bit only after checking that the core is neither writing to the TxFIFO nor reading from the TxFIFO".
Bug: This is not implemented.
--- USBD_FS_STM32F4xx.c * $Date: 26. May 2016 * $Revision: V2.15
static void USBD_FlushInEpFifo (uint8_t FIFO_num) {
while ((OTG->GRSTCTL & OTG_FS_GRSTCTL_TXFFLSH) != 0U); OTG->GRSTCTL = (OTG->GRSTCTL & ~OTG_FS_GRSTCTL_TXFNUM_MSK) | OTG_FS_GRSTCTL_TXFNUM(FIFO_num); OTG->GRSTCTL |= OTG_FS_GRSTCTL_TXFFLSH; while ((OTG->GRSTCTL & OTG_FS_GRSTCTL_TXFFLSH) != 0U); // high risk for infinity Loop }
STM32F4 reference Manual:
Bit 5 TXFFLSH: TxFIFO flush This bit selectively flushes a single or all transmit FIFOs, but cannot do so if the core is in the midst of a transaction. The application must write this bit only after checking that the core is neither writing to the TxFIFO nor reading from the TxFIFO. Verify using these registers: Read—NAK Effective Interrupt ensures the core is not reading from the FIFO Write—AHBIDL bit in OTG_FS_GRSTCTL ensures the core is not writing anything to the FIFO. Note: Accessible in both device and host modes.