Hi,I have STM32F4 interfaced with the external SRAM sized 512kx16 array. Now what I believe is (Pls correct me if i am wrong), Pointing to Every incremental Address should give me 16bit data. because SRAM is interfaced with 16bit wide data bus (non multiplexed)
For Example: 0x64000000 is the base address of my external SRAM. And I want to write hello, to this RAM, then It should happen like... on 0x64000000 location, data should be written, 'H' 'E' & on 0x64000001 location, data should be written, 'L' 'L' & on 0x64000002 location, data should be written, 'O' 0xff . And the same is should be getting in read back.
But What actually occurs is on 0x64000000 location, data should be written, 'H' 'E' & on 0x64000001 location, data should be written, 'E' 'L' & on 0x64000002 location, data should be written, 'L' 'L' & on 0x64000003 location, data should be written, 'L' 'O' & on 0x64000004 location, data should be written, 'O' 0xff . So If I want to get the write data, I will have to read back 16 bit data from location 0x64000000, 0x64000002, and 0x64000004.
Can Anyone Has the experience of interfacing 512kx16bit array SRAM ? and facing the similar issues ??
Thanks For Reply,
I am using AS6C8016, which is 512kx16bit array SRAM. It has A0-A18 Address bus, so technically I can address only 524287 location, lets say 512K, And now according to you, If I can access 1 byte only per one location, then How can I access 1 MByte memory, [which is as per their data sheet, 8,388,608-bit/8MBit/1Mbyte]. It has UB/LB control pins too, but I think It is for the 16bit-data bus access control only. Not for the Memory array control of the SRAM right ?
You configure the FMC to make this work properly. The FMC can be configured to access 8-bit memory, 16-bit memory and 32-bit memory. This is the key to your questions.