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how to simulate special registers in ARM Core

Pepoja

Hi all,

I have a problem.

I can simulate my application (C and Keil uVision5). Target: LPC824
But, simulator stopped at one line: wait for PLL Locked.

After change PLL control register (SYSPLLCTRL), application must wait while bit LOCK in SYSPLLSTAT register is zero. In realtime debugging in target working fine, but in simulator don't work - SYSPLLSTAT don't changed.

Please, How to simulate changes in SYSPLLSTAT register (this is read-only register)?

LPC82x User's manual: www.nxp.com/.../UM10800.pdf - see 5.6.4 on page 35

Thank you.

peter

Parents
  • 0 in reply to ImPer Westermark

    These registers aren't in the "ARM Core", they are vendor circuity peripheral to the core.

    Some people use and have access to gate level simulation, they also have very big checkbooks.

    You try to make your software sufficiently abstracted that you can test it's core functionality in a test harness, and emulate the hardware with your own software at the edges.

Reply
  • 0 in reply to ImPer Westermark

    These registers aren't in the "ARM Core", they are vendor circuity peripheral to the core.

    Some people use and have access to gate level simulation, they also have very big checkbooks.

    You try to make your software sufficiently abstracted that you can test it's core functionality in a test harness, and emulate the hardware with your own software at the edges.

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