Hello again,
I recently have had success with a STM32F4 series development board and would like to scale the results with more processing. The function in questions is "arm_biquad_cascade_df1_f32". What I would like to know is, how many CPU cycles does this function take? I'm sure it depends on several parameters such as the block size, the amount of IIR stages, etc. However if anybody can steer me in the right direction I would deeply appreciate it.
- John