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complete execute a function even when interrupt arise?

Is there any method to complete a function when a interrupt arise. In project, i'm using stm32f103vx.

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  • Why not synchronzie the clock between ADC and DAC?

    The SPI either is fast enough, or not fast enough to run both ADC and DAC. If the SPI isn't fast enough, then you need to step up the baudrate. If that can't be done then your design doesn't work.

    If the SPI is fast enough, then start a ADC read using SPI when the timer ticks. When the SPI generates an interrupt that it is done - issue the DAC command. If ADC and DAC needs to run on different clocks, then you have no option but suffering the jitter of having to buffer and delay some commands. So if you get a timer tick but the SPI isn't ready then you ened to set a flag - the SPI end-transmit interrupt can then see the flag and issue the delayed ADC command. Or see that there is a delayed DAC command to perform.

    Obviously, the same SPI device should never be used for both ADC and DAC in case the two needs to run at different freqnecy and you can't accept jitter.

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  • Why not synchronzie the clock between ADC and DAC?

    The SPI either is fast enough, or not fast enough to run both ADC and DAC. If the SPI isn't fast enough, then you need to step up the baudrate. If that can't be done then your design doesn't work.

    If the SPI is fast enough, then start a ADC read using SPI when the timer ticks. When the SPI generates an interrupt that it is done - issue the DAC command. If ADC and DAC needs to run on different clocks, then you have no option but suffering the jitter of having to buffer and delay some commands. So if you get a timer tick but the SPI isn't ready then you ened to set a flag - the SPI end-transmit interrupt can then see the flag and issue the delayed ADC command. Or see that there is a delayed DAC command to perform.

    Obviously, the same SPI device should never be used for both ADC and DAC in case the two needs to run at different freqnecy and you can't accept jitter.

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