Hi all,
I am trying to debug the SSP peripheral (in SPI mode)with Keil and I have a few questions about this.
First of all I would like to see how to view the contents of the frame buffer. If you use the Peripherals->SSP option of Keil you can't even see what is in the data register (SSP1DR) as it always defaults to zero.
Does anyone know how to solve this?
Also I am kind of confused on how exactly does the data move from the data register to the Frame Buffer. Does the data register hold the data at all or does it just shift them right out to the buffer?
And finally when I am running the program in debug mode and stepping commands one by one does the ssp peripheral still send data back and forth?
Thank you very much in advance.
With kind regards,
Sat
But "read access" to the FIFO would require that NXP - the chip maker - creates the FIFO using some form of dual-port RAM so that the JTAG adapter can view the FIFO without modifying any state.
The top of the FIFO is visible to the program. And reading it will consume that element which is a very big reason why the debugger do not want to request the JTAG adapter to make a read of that address - there would be no way for the JTAG adapter to push back what it has consumed. So in the end, you need to ask NXP if they would be willing to add special access mechanisms in their chips - without dedicated hardware support in the chip, it will be the same for Keil, IAR, ...
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