Hullo guys , I had to write my own assembly subroutines to be called from C files . From the ARM Cortex-M documentation , it's clear that when an interrupt occur , only R0->R3 , R12 are pushed into stack . So for safe operation , those 're the only registers allowed to be used when interrupts 're enabled ?
You think it's bad that the Cortex-M saves a number of registers? Most processors hardly save any state at all...
You do not want a processor that saves all state to memory, since saving state consumes memory bandwidth and affects latency. So the only solution is to have complete register banks to switch between. But not easy to do either in case you want nested interrupts - then each interrupt nesting needs one more register bank.
In the end, the compiler will have to save extra registers in case of a C function. And the developer - you - will have to save extra state in case of an assembly-written routine.
well , Per Westermark , so the best thing is to push the rest of the registers at the very beginning of the ISR , and then pop them at the very end of it ? (the ISR will be in C) , or u have another better suggestion . >>> Thx in advance