Hello,
I am trying to create a Context Swithcing mechanisms for Cortex M3 (NXP LPC 1768) IC. I am using Keil uVision (so ARMCC).
I almost copied FreeRTOS implementation to see how it works? When I close code optimization (-o0), there is no problem. It jumps to SVC Handler and switching context to first task. (and switching to next tasks later by PendSV Handler.
But If I compile my code with -o3 code optimization level, I cannot observe same behaviour and as I see, It is not jumping to first task so SVC_Handler is not probably being called.
In also, interesting thing is if I put breakpoints into my tasks in Real Time debugging mode of uVision, execution and context switching work well for -O3 but If I remove breakpoints and continoue to execution, I am observing broken behaviour.
I am not sure but can it be related with code optimization of SVC and PendSV ISR functions and should I discard optimizations on that ISRs?
GCC implementations suggest "__attribute__((naked))" attribute to discard optimizations on SVC and PendSV Handlers but I could not see similar suggestions for ARMCC. FreeRTOS implementation also does not have any attribute on SVC and PendSV ISRs.
What can be problem with that issue?
Sorry, similar question was asked before and can you please provide reference of it.
Regards. Murat C.
GCC implementations suggest "__attribute__((naked))" attribute to discard optimizations on SVC and PendSV Handlers but I could not see similar suggestions for ARMCC.
Note that the "naked" attribute isn't about optimizations. It controls if the compiler should add additional register save/restore code or not. So with "naked", you promise to take over the responsibility of saving all registers you need to play with.