To illustrate my problem, I just implemented demonstration code:
#include <stdint.h> uint64_t read(const uint32_t *wordStream) { uint32_t low = *wordStream++; uint64_t high = *wordStream++; high <<= 32; return high | low; }
This code reads (according to C) two unsigned 32 bit words. It assumes a little endian notation. Then it assembles these two words into a 64 bit value and returns it.
Unfortunately, the compiler assumes, that the first word is 64 bit aligned (by using the LDRD instruction which is only allowed on aligned 64 bit values):
; generated by Component: ARM Compiler 5.06 update 1 (build 61) Tool: armcc [4d35ad] ; commandline armcc [--thumb -c --asm -otestCode.o --cpu=SC300 testCode.c] THUMB REQUIRE8 PRESERVE8 AREA ||.text||, CODE, READONLY, ALIGN=1 read PROC LDRD r2,r1,[r0,#0] MOV r0,r2 BX lr ENDP ...
Where did I tell the compiler that the first word is aligned?
I think you should consider contacting Keil support about this. It looks like some optimization bug, where some optimization step thought it rewrite the code stream to use a more optimal instruction sequence.
See the support menu choice at the top of this page.
Thanks for the confirmation of my doubts. I just filed a case.
Werner