Hello, I'm currently writing code to decode RC5/6 signals. Therefore, I'm using Timer2 of a 8032 processor because of its very convenient time measurement capabilities. The Timer2 is set in the Capture mode, so that whenever a 1->0 transient is occuring on P1.1 (T2EX) the content of Timer2 is stored in RCAP2H and RCAP2L (content of T2CON = 0x09). However, an annoying 'side effect' is that my interrupt service routine is not only called whenever such a transient on T2EX is occuring, but also when Timer2 itself is overflowing, since this timer has to run internally. I know this is according the specs of the 8032, but I wonder if there's a way to 'filter out' this --for me-- useless interrupt. And I don't mean checking for the EXF2 flag, because that's what I'm already doing, but really avoiding even the call to my ISR when the cause is an overflow of Timer2. My goal is to use the speed of the processor in an as much as possible optimized way, so therefore I would like to avoid the time 'spoiled' by a useless call to my Timer2 ISR. Of course, I'm clearing both the EXF2 as well as the TF2 flag in my ISR. Any idea how to do this? Rgds, Geert
Uhhh, If the ISR isn't called for over/under flow, how do you know if the pulse width longer than the timer can count? Typically, when you detect an overflow of the timer, you increment a variable that counts the overflows. Jon