Strange Compiler behaviour

Hello,
I have to migrate from one type LCD to another. So, I cloned the project for the new LCD type.
The problem is that almost identical code(software SPI) is compiled in very different manner.

Old project code:

//lS020:
void SendData(WORD wrd){
        BYTE i;
        Cs = 0;
        for (i = 16; i > 0; i--)
        {
                Dat = wrd & 0x8000;
                Clk = 0;
                Clk = 1;
                wrd = wrd<<1;
        }
        Cs = 1;
}

compiled as:

   47: void SendData(WORD wrd){
    48:         BYTE i;
    49:         Cs = 0;
C:0x3A7B    C2A2     CLR      PC2(0xA0.2)
    51:         for (i = 16; i > 0; i--)
C:0x3A7D    7D10     MOV      R5,#0x10
    52:         {
    53:                 Dat = wrd & 0x8000;
C:0x3A7F    EE        MOV      A,R6
C:0x3A80    33         RLC      A
C:0x3A81    92A4     MOV      PC4(0xA0.4),C
    54:                 Clk = 0;
C:0x3A83    C2A3     CLR      PC3(0xA0.3)
    55:                 Clk = 1;
C:0x3A85    D2A3     SETB     PC3(0xA0.3)
    56:                 wrd = wrd<<1;
C:0x3A87    EF         MOV      A,R7
C:0x3A88    25E0     ADD      A,ACC(0xE0)
C:0x3A8A    FF         MOV      R7,A
C:0x3A8B    EE        MOV      A,R6
C:0x3A8C    33         RLC      A
C:0x3A8D    FE        MOV      R6,A
    57:         }
C:0x3A8E    DDEF   DJNZ     R5,C:3A7F
    58:         Cs = 1;
C:0x3A90    D2A2     SETB     PC2(0xA0.2)
    59: }
C:0x3A92    22       RET

New project code:

//ILI9341:
void TFT_SendData(WORD wrd){
        BYTE i;
        Rs = 1;
        for (i = 16; i > 0; i--)
        {
                Dat = wrd & 0x8000;
                Clk = 0;
                Clk = 1;
                wrd = wrd<<1;
        }
}

compiled as:

    55: void TFT_SendData(WORD wrd){
    56:         BYTE i;
    57:         Rs = 1;
C:0x3AB5    D284     SETB     PA4(0x80.4)
    58:         for (i = 16; i > 0; i--)
C:0x3AB7    7D10     MOV      R5,#0x10
    59:         {
    60:                 Dat = wrd & 0x8000;
C:0x3AB9    EE        MOV      A,R6
    61:                 Clk = 0;
    62:                 Clk = 1;
    63:                 wrd = wrd<<1;
C:0x3ABA  123578   LCALL    L?0081(C:3578)
C:0x3ABD    EE       MOV      A,R6
C:0x3ABE    33       RLC      A
C:0x3ABF    FE       MOV      R6,A
    64:         }
C:0x3AC0    DDF7     DJNZ     R5,C:3AB9
    66: }
C:0x3AC2    22       RET

C:0x3578    33       RLC      A
C:0x3579    9285     MOV      PA5(0x80.5),C
C:0x357B    C286     CLR      PA6(0x80.6)
C:0x357D    D286     SETB     PA6(0x80.6)
C:0x357F    EF       MOV      A,R7
C:0x3580    25E0     ADD      A,ACC(0xE0)
C:0x3582    FF       MOV      R7,A
C:0x3583    22       RET

As as result I have 30% speed degrade.

Both projects settings are identical. I see no logic in such behaviour, and now I have to use assembler block instead.
The question is: what happened and how to avoid?