I'm using a bit outdated version of Keil uVision (4.70) because it provides simulation of peripherals for a couple of MCUs.
So, I'm using simulator for stm32f103rb and I'm using Timer 1. I want to look at TIM1->CNT register (i.e. current timer counter value).
So I added TIM1->CNT in logic analyzer. I expected to see how CNT gradually grows from 0 to maximum. Insted I saw something similar to square wave: 0 for some time then maximum for some time. I totally wasn't expecting that.
Is that normal? Is there any way to force logic analyzer to draw all values, or maybe timer is counting to fast?
Again, I'm using simulator, not ETM with real hardware.
Is the logic analyzer in the IDE expected to be able to show internal counter values?
The concept of a logic analyzer is normally to show digital signals - i.e. low or high. Then some logic analyzers have smart decoding units, so they may decode UART, I2C, CAN, ... and present state information or ASCII/HEX data.
The digital output of a processor timer would be maybe a PWM signal if you use match registers to toggle an output pin. That would be what a physical logic analyzer would be able to see.
Per Westermark, well, logic analyzer in Keil is very capable of showing analog values, even float and double variables.
Yes, it can do a lot of nice things.
But I did look at this specific page: http://www.keil.com/dd/chip/4231.htm
And there, I did not see anything mentioning about the timer 1 counter value being available for plotting.
Have you seen any better link, with information about what it can, and can not, plot for your processor?
Hi,
the Locic Analyzer does not sample. In fact the CPU's (internal) DWT Unit is used to read and send out a memory location (the variable) on each WRITE. This means, in the simulation you will get each change (also to the same value) of the variable reported, and on real hardware this depends on your Debugger's speed.
When using a ULINK pro and you sample a ADC chanel with a Potentiometer (without changing it's position) in a very fast loop or an a fast timer interval, you can see the noise of the ADC in the Logic Analyzer :-)
. BR, /th.
This means, in the simulation you will get each change (also to the same value) of the variable reported, and on real hardware this depends on your Debugger's speed.
Do you mean that in simulation not all values of timer counter register are actually written? And there is no way to force them?