changing Clock and PLL setting

It's a function multiplication and division.

Pick the HSI as the source, set the PLL_M division to 16 to get the comparison frequency as 1 MHz, then all the other would stay the same PLL_N 336 (x336), PLL_P w (/2)

(16 / 16) * 336 / 2 = 168
QED

It's a function multiplication and division.

Pick the HSI as the source, set the PLL_M division to 16 to get the comparison frequency as 1 MHz, then all the other would stay the same PLL_N 336 (x336), PLL_P w (/2)

(16 / 16) * 336 / 2 = 168
QED

Thank you, before refreshing my windows I used the way you explained, but what should I do when the system_stm32f4xx.c is:

/**
  ******************************************************************************
  * @file    system_stm32f4xx.c
  * @author  MCD Application Team
  * @version V2.1.0 modified by ARM
  * @date    19-June-2014
  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.

how should I set the values in this file? or should I work with registers(RCC_CR,_PLLCFGR,_CFGR) directly?!

previously it was like this

/************************* PLL Parameters *************************************/
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_M      8
#define PLL_N      336

/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P      2

/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
#define PLL_Q      7

/******************************************************************************/

easy to set the PLL parameters!

ST changed the System file recently which now does not configure the clock system anymore but rather leaves this to the application.

Take a look at the project examples to see the details.

‘main’ function typically first calls HAL_Init() and then SystemClock_Config() function which configures the system clock.

/* System Clock Configuration */
void SystemClock_Config(void) {
  RCC_OscInitTypeDef RCC_OscInitStruct;
  RCC_ClkInitTypeDef RCC_ClkInitStruct;

  /* Enable Power Control clock */
  __PWR_CLK_ENABLE();

  /* The voltage scaling allows optimizing the power consumption when the
     device is clocked below the maximum system frequency (see datasheet). */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

  /* Enable HSE Oscillator and activate PLL with HSE as source */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLM = 8;
  RCC_OscInitStruct.PLL.PLLN = 336;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = 7;
  HAL_RCC_OscConfig(&RCC_OscInitStruct);

  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
     clocks dividers */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 |
                                RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
}

int main (void) {
  HAL_Init();               /* Initialize the HAL Library */
  SystemClock_Config();     /* Configure the System Clock */
  // ...
}

Thanks a lot for your kind help, I'm not familiar with the way you are using, I work directly with the register as follows:

//##############################################################################
                                //1//Don't know how to change oscillator type to HSI
RCC->CR |= 0x00000001;          //2//HSI oscillator ON
RCC->CR |= 0x01000000;          //3//PLL ON
RCC->PLLCFGR |= 0x00400000;     //4//Select HSI as PLL source
RCC->PLLCFGR |= 0x00004810;     //5//adjusting PLL parameters M N P Q for 168MHz (PLL sys clock)
RCC->CFGR |= 0x00000002;        //6//Select PLL as clock sourse
RCC->CFGR |= 0x00009400;        //7//Prescaler for AHB(HCLK)-APB1(PCLK1)-APB2(PCLK2)
//AHB  BUS  is adjusted by Bits 07:04 and its value is 0xxx that means no division from SYSCLK;
//APB1 BUS  is adjusted by Bits 12:10 and its value is  101 that means division AHB by 4;
//APB2 BUS  is adjusted by Bits 15:13 and its value is  100 that means division AHB by 2;
//###########################################################################################

I wrote my code in similar approach as your code(1 to 7). didn't work!
Is my procedure correct?
Do I need to change any register before others?!
Or is there any other register?!

My Discovery board do nothing! seems to be locked because of special setting I have done blow.

thanks again

In principal you can work that way. However this will be hard.

I suggest that you use an existing example project [such as the CMSIS-RTOS Blinky (STM32F4-Discovery)] and run to main. Then you can see the register values that are written by the SystemClock_Config function and copy these values.

Well, if you choose to work directly with the registers, then you must also accept the responsibility to study and fully understand all those registers, how they work, and and how to use them.

See: http://www.keil.com/forum/59715

Thank you!

the procedure of configuring the register is different you have to configure pllcfgr first and then turn on pll similarly set the ahb and apb prescalar values first and then select the system clock.