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STM32 custom bootloader fail

Hello everybody,

I'm working on a custom bootloader for STM32F407/F411. It start at 0x08000000 and works in a ordinary way, loading Intel-Hex files through the UART, interprets the file and programs the FLASH. Then it sets the MSP and jumps to the loaded code (the code is linked i.e. at 0x08008000 and there the VTOR is relocated). Everything is just fine. The problem begins, when I want the loaded code to invoce a new flashing (from outside the bootloader). I'm setting a function handler, pointing at my flashing function (with propper aguments ofcourse) and jump there (the address of my flashing function I read out from my *.map file from the bootloader code). When I call the flashing function, after FLASH sector erasing the core jumps to 0xFFFFFFFE. I don't know what is happening. The prefetch and I/D caches in the FLASH ACR register are disabled. Please help.

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  • Yes, that does seem a bit perplexing. Not sure I can do anything with out "hands on".

    You could try doing this in a very simple configuration and confirm if the problem exists there or not.

    ST tends to AND/OR bits into the registers rather that explicitly write values to them. You might want to look at the libraries, or where some additional latency is caused by subroutine call/return overheads which you're dealing with by inserting a delay. Does equivalent library code malfunction?

    Look carefully at the generated assembler, see if there is anything odd there, and that the accesses are done as if the peripheral registers are volatile.

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  • Yes, that does seem a bit perplexing. Not sure I can do anything with out "hands on".

    You could try doing this in a very simple configuration and confirm if the problem exists there or not.

    ST tends to AND/OR bits into the registers rather that explicitly write values to them. You might want to look at the libraries, or where some additional latency is caused by subroutine call/return overheads which you're dealing with by inserting a delay. Does equivalent library code malfunction?

    Look carefully at the generated assembler, see if there is anything odd there, and that the accesses are done as if the peripheral registers are volatile.

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