Hi, I have set PLL of STM32F103RE chip with the following function to 36Mhz, but the operation frequency is much lower??
void Config_clock(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_9);//36Mhz /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Set HCLK, PCLK1, and PCLK2 to SCLK (these are default */ RCC_HCLKConfig(RCC_SYSCLK_Div1); RCC_PCLK1Config(RCC_HCLK_Div1); RCC_PCLK2Config(RCC_HCLK_Div1); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } /* Enable USART1 and GPIOA clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); } /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO, ENABLE); /*------------------- Resources Initialization -----------------------------*/ /* ADCCLK = PCLK2/8 */ RCC_ADCCLKConfig(RCC_PCLK2_Div8); /* Enable DMA clock */ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); /* Enable ADC1 and GPIOC clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ALL, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_ALL, ENABLE); /* If HSE is not detected at program startup */ if(HSEStartUpStatus == ERROR) { /* Generate NMI exception */ NVIC_SetSystemHandlerPendingBit(SystemHandler_NMI); } }