Hi, I'm working with a LPC1758 processor and an AT45 dataflash. The dataflash communicate with the processor by SSP1 and dma.
In my first attempt: I want to read the status register from the dataflash. The specific command is a single byte 0xD7 - no addr bytes or dummy bytes have to be transmitted to the dataflash.
I setup the corresponding tx dma channel
#define tx_datasize 1 /* at45-command-size */ pHw->DMACCControl = (tx_datasize & 0x0FFF)|(0x00 << 12) |(0x00 << 15)|(0x00 << 18)|(0x00 << 21)|(1 << 26)|0x80000000;
and start the transfer.
Unfortunately the dma interrupt handler isn't called. The error seems to be due to the "tx_datasize". If I set the "tx_datasize" to 2 the dma interrupt handler is called.
I couldn't find any information in the user manual that told me that I've to increase the tx_datasize....
best regards Lars
I've changed my dma channel to
pHw->DMACCControl = (tx_datasize & 0x0FFF)|(0x02 << 12) |(0x02 << 15)|(0x00 << 18)|(0x00 << 21)|(1 << 26)|0x80000000;
and now I transmit the status register request byte 0xD7.
Now, the AT45 device should responde with a 2byte message. Therefore I tried to establish another dma channel in the dma irq handler.
#define DMA_SSP1_TX 2 #define DMA_SSP1_RX 3 void DMA_IRQHandler(void) { unsigned int state; state = LPC_GPDMA->DMACIntTCStat; if ( state ) { LPC_GPDMA->DMACIntTCClear = state; if ( state & (0x01<<1) ) { //start a new P2M dma transaction to get the status bytes from the AT45 DMA_InitChannel(3, P2M); LPC_GPDMACH1->DMACCConfig = 0x0C001|(0x00<<6)|(DMA_SSP1_RX<<1)|(pDma->mode<<11); } } state = LPC_GPDMA->DMACIntErrStat; if ( state ) LPC_GPDMA->DMACIntErrClr = state; }
Unfortunately I didn't get any other dma irq response....
My channel is now
#define rx_datasize 2 void DMA_InitChannel() { LPC_GPDMA->DMACIntTCClear = 0x01<<3; LPC_GPDMA->DMACIntErrClr = 0x01<<3; LPC_GPDMACH3->DMACCControl = 0; LPC_GPDMACH3->DMACCConfig = 0; LPC_GPDMACH3->DMACCLLI = 0; //DMACCSrcAddr + DMACCDestAddr already set pHw->DMACCControl = (rx_datasize & 0x0FFF)|(0x02 << 12) |(0x02 << 15)|(0x00 << 18)|(0x00 << 21)|(1 << 27)|0x80000000; }
Is there something wrong in my code?
I think the burst size and transfer width settings are not correct - maybe someone else could help you further; cause I didn't know it by heart... but that could be the problem to your description...