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FlashFS NAND K9F5608 not work

Hi,

I'm having trouble configuring the NAND K9F5608U in FlashFS.
The File_Config.c file has no configuration options for this memory. If I am not wrong, the setting should be:

Page size = 16384 + 512 bytes
Block size = 32 pages
Devise size = 2048 blocks

I have done work NAND K9F1G08U but my hardware requires K9F5608U (I'm using a LPC2478).

Some help?

Parents
  • Finally the functions read() and write() are working.
    The problem is that this memory for the CS pin was not well controlled by EMC. Needed a CS manual control in the two functions:

    static void xk9f5608_cs_0(void) {
    #if XK9F5608_CS == XNAND_CS0
            /* Chip enable 0: P4.30 - CS0 [nCE] */
            PINSEL9 &= ~(3UL << 28);
            FIO4DIR |= (1UL << 30);
            FIO4CLR |= (1UL << 30);
    #elif XK9F5608_CS == XNAND_CS1
            /* Chip enable 1: P4.31 - CS1 [nCE] */
            PINSEL9 &= ~(3UL << 30);
            FIO4DIR |= (1UL << 31);
            FIO4CLR |= (1UL << 31);
    #elif XK9F5608_CS == XNAND_CS2
            /* Chip enable 2: P2.14 - CS2 [nCE] */
            PINSEL4 &= ~(3UL << 30);
            FIO2DIR |= (1UL << 14);
            FIO2CLR |= (1UL << 14);
    #elif XK9F5608_CS == XNAND_CS3
            /* Chip enable 3: P2.15 - CS3 [nCE] */
            PINSEL4 &= ~(3UL << 30);
            FIO2DIR |= (1UL << 15);
            FIO2CLR |= (1UL << 15);
    #endif
    }
    
    static void xk9f5608_cs_1(void) {
    #if XK9F5608_CS == XNAND_CS0
            /* Chip enable 0: P4.30 - CS0 [nCE] */
            FIO4SET |= (1UL << 30);
            PINSEL9 = (PINSEL9 & ~(3UL << 28)) | (1UL << 28);
    #elif XK9F5608_CS == XNAND_CS1
            /* Chip enable 1: P4.31 - CS1 [nCE] */
            FIO4SET |= (1UL << 31);
            PINSEL9 = (PINSEL9 & ~(3UL << 30)) | (1UL << 30);
    #elif XK9F5608_CS == XNAND_CS2
            /* Chip enable 2: P2.14 - CS2 [nCE] */
            FIO2SET |= (1UL << 14);
            PINSEL4 = (PINSEL4 & ~(3UL << 28)) | (1UL << 28);
    #elif XK9F5608_CS == XNAND_CS3
            /* Chip enable 3: P2.15 - CS3 [nCE] */
            FIO2SET |= (1UL << 15);
            PINSEL4 = (PINSEL4 & ~(3UL << 30)) | (1UL << 30);
    #endif
    }
    


    read() and write():

    int xk9f5608_read_page(uint32_t block, uint32_t page, uint8_t *buf) {
            uint32_t addr;
            uint32_t i;
            int ret;
    
            if (buf == NULL)
                    return XNAND_INVALID_PARAM;
    
            addr = (block << 5) + page;
            xk9f5608_cs_0(); // CS -> GPIO
            xk9f5608_wr_cmd(XK9F5608_CMD_READ1HALF);
            XK9F5608_EMC_ADDR8 = 0;
            XK9F5608_EMC_ADDR8 = (addr & 0xFF);
            XK9F5608_EMC_ADDR8 = ((addr >> 8) & 0xFF);
    
            if (xk9f5608_wait_busy() == XNAND_OK) {
                    for (i = XK9F5608_PAGE_SIZE; i; i--)
                            *buf++ = XK9F5608_EMC_DATA8;
    
                    if (xk9f5608_wait_busy() == XNAND_OK)
                            ret = XNAND_OK;
                    else
                            ret = XNAND_BUSY;
            }
            else {
                    ret = XNAND_BUSY;
            }
    
            xk9f5608_cs_1(); // CS -> EMC
            return ret;
    }
    
    int xk9f5608_write_page(uint32_t block, uint32_t page, const uint8_t *buf) {
            uint32_t addr;
            uint32_t i;
    
            if (buf == NULL)
                    return XNAND_INVALID_PARAM;
    
            addr = (block << 5) + page;
            xk9f5608_cs_0(); // CS -> GPIO
            xk9f5608_wr_cmd(XK9F5608_CMD_READ1HALF);
            xk9f5608_wr_cmd(XK9F5608_CMD_PROGRAM1ST);
            XK9F5608_EMC_ADDR8 = 0;
            XK9F5608_EMC_ADDR8 = (addr & 0xFF);
            XK9F5608_EMC_ADDR8 = ((addr >> 8) & 0xFF);
            for (i = XK9F5608_PAGE_SIZE; i; i--)
                    XK9F5608_EMC_DATA8 = *buf++;
            xk9f5608_wr_cmd(XK9F5608_CMD_PROGRAM2ND);
            xk9f5608_cs_1(); // CS -> EMC
    
            if (xk9f5608_wait_busy() == XNAND_BUSY)
                    return XNAND_BUSY;
    
            return xk9f5608_wait_status();
    }
    


    Now I'm able to use the FileSystem with EBS format.
    Fat32 is not working, always returns 2 in finit().

Reply
  • Finally the functions read() and write() are working.
    The problem is that this memory for the CS pin was not well controlled by EMC. Needed a CS manual control in the two functions:

    static void xk9f5608_cs_0(void) {
    #if XK9F5608_CS == XNAND_CS0
            /* Chip enable 0: P4.30 - CS0 [nCE] */
            PINSEL9 &= ~(3UL << 28);
            FIO4DIR |= (1UL << 30);
            FIO4CLR |= (1UL << 30);
    #elif XK9F5608_CS == XNAND_CS1
            /* Chip enable 1: P4.31 - CS1 [nCE] */
            PINSEL9 &= ~(3UL << 30);
            FIO4DIR |= (1UL << 31);
            FIO4CLR |= (1UL << 31);
    #elif XK9F5608_CS == XNAND_CS2
            /* Chip enable 2: P2.14 - CS2 [nCE] */
            PINSEL4 &= ~(3UL << 30);
            FIO2DIR |= (1UL << 14);
            FIO2CLR |= (1UL << 14);
    #elif XK9F5608_CS == XNAND_CS3
            /* Chip enable 3: P2.15 - CS3 [nCE] */
            PINSEL4 &= ~(3UL << 30);
            FIO2DIR |= (1UL << 15);
            FIO2CLR |= (1UL << 15);
    #endif
    }
    
    static void xk9f5608_cs_1(void) {
    #if XK9F5608_CS == XNAND_CS0
            /* Chip enable 0: P4.30 - CS0 [nCE] */
            FIO4SET |= (1UL << 30);
            PINSEL9 = (PINSEL9 & ~(3UL << 28)) | (1UL << 28);
    #elif XK9F5608_CS == XNAND_CS1
            /* Chip enable 1: P4.31 - CS1 [nCE] */
            FIO4SET |= (1UL << 31);
            PINSEL9 = (PINSEL9 & ~(3UL << 30)) | (1UL << 30);
    #elif XK9F5608_CS == XNAND_CS2
            /* Chip enable 2: P2.14 - CS2 [nCE] */
            FIO2SET |= (1UL << 14);
            PINSEL4 = (PINSEL4 & ~(3UL << 28)) | (1UL << 28);
    #elif XK9F5608_CS == XNAND_CS3
            /* Chip enable 3: P2.15 - CS3 [nCE] */
            FIO2SET |= (1UL << 15);
            PINSEL4 = (PINSEL4 & ~(3UL << 30)) | (1UL << 30);
    #endif
    }
    


    read() and write():

    int xk9f5608_read_page(uint32_t block, uint32_t page, uint8_t *buf) {
            uint32_t addr;
            uint32_t i;
            int ret;
    
            if (buf == NULL)
                    return XNAND_INVALID_PARAM;
    
            addr = (block << 5) + page;
            xk9f5608_cs_0(); // CS -> GPIO
            xk9f5608_wr_cmd(XK9F5608_CMD_READ1HALF);
            XK9F5608_EMC_ADDR8 = 0;
            XK9F5608_EMC_ADDR8 = (addr & 0xFF);
            XK9F5608_EMC_ADDR8 = ((addr >> 8) & 0xFF);
    
            if (xk9f5608_wait_busy() == XNAND_OK) {
                    for (i = XK9F5608_PAGE_SIZE; i; i--)
                            *buf++ = XK9F5608_EMC_DATA8;
    
                    if (xk9f5608_wait_busy() == XNAND_OK)
                            ret = XNAND_OK;
                    else
                            ret = XNAND_BUSY;
            }
            else {
                    ret = XNAND_BUSY;
            }
    
            xk9f5608_cs_1(); // CS -> EMC
            return ret;
    }
    
    int xk9f5608_write_page(uint32_t block, uint32_t page, const uint8_t *buf) {
            uint32_t addr;
            uint32_t i;
    
            if (buf == NULL)
                    return XNAND_INVALID_PARAM;
    
            addr = (block << 5) + page;
            xk9f5608_cs_0(); // CS -> GPIO
            xk9f5608_wr_cmd(XK9F5608_CMD_READ1HALF);
            xk9f5608_wr_cmd(XK9F5608_CMD_PROGRAM1ST);
            XK9F5608_EMC_ADDR8 = 0;
            XK9F5608_EMC_ADDR8 = (addr & 0xFF);
            XK9F5608_EMC_ADDR8 = ((addr >> 8) & 0xFF);
            for (i = XK9F5608_PAGE_SIZE; i; i--)
                    XK9F5608_EMC_DATA8 = *buf++;
            xk9f5608_wr_cmd(XK9F5608_CMD_PROGRAM2ND);
            xk9f5608_cs_1(); // CS -> EMC
    
            if (xk9f5608_wait_busy() == XNAND_BUSY)
                    return XNAND_BUSY;
    
            return xk9f5608_wait_status();
    }
    


    Now I'm able to use the FileSystem with EBS format.
    Fat32 is not working, always returns 2 in finit().

Children
  • Hi,

    Look..

    finit("N0:"); // return 2 (Volume Error)
    fformat("N0:"); // return 0 (EFS)
    finit("N0:"); // return  0
    
    ...
    
    finit("N0:"); // return 2 (Volume Error)
    fformat("N0: /FAT32"); // return 1
    finit("N0:"); // return 2 (Volume Error)
    
    ...
    
    finit("N0:"); // return 2 (Volume Error)
    fformat("N0: /FAT32 /WIPE"); // return 1
    finit("N0:"); // return 2 (Volume Error)
    
    
    ...
    
    finit("N0:"); // return 2 (Volume Error)
    fformat("N0: /FAT32 /WIPE /LOW_EB"); // return 1
    finit("N0:"); // return 2 (Volume Error)
    

    file_lib.c for FAT32

    nand0_UnInit: return 1
    nand0_RdSect: return __TRUE (ftl_ReadSect return RTV_NOERR)
    nand0_WrSect: return __TRUE (ftl_WriteSect return RTV_NOERR)
    nand0_RdInfo: return 1
    nand0_DevCtrl: return M_NOCHKMEDIA (code == DC_CHKMEDIA)
    nand0_DevCtrl: return 1 (code == DC_FORMAT)
    
    nand0_dev->PgLay.Pos_LSN = 0x00
    nand0_dev->PgLay.Pos_COR = 0x04
    nand0_dev->PgLay.Pos_BBM = 0x05
    nand0_dev->PgLay.Pos_ECC = 0x06
    nand0_dev->PgLay.SecInc = 0x0210
    nand0_dev->PgLay.SpareOfs = 0x0200
    nand0_dev->PgLay.SpareInc = 0x0210
    

  • Found the problem..

    finit("N0: /FAT32"); // Error
    finit("N0: /fat32"); // Ok
    

    File system working!

  • NAND drive can only be formatted with FAT12, FAT16 or FAT32 file system. You cannot format your device with FAT32 because it is to small (FAT32 volume requires at least 65,527 clusters of space).

    if (fformat("N0:") == 0) {
      /* NAND drive formatted with FAT12 or FAT16 or FAT32 (depends on its size) */
    }
    
    if (fformat("N0: /fat32") = 0) {
      /* NAND drive formatted with FAT12 or FAT16 (depends on its size) */
      /* because FlashFS does not detect lowercase switch */
    }
    
    if (fformat("N0: /FAT32") == 0) {
      /* NAND drive formatted with FAT32 */
    }
    

    Since size of your device is 32MB, it was most likely formatted using FAT16 ;)