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Why R0 and R1 for indirect addressing?

Why do we use R0 and R1 in indirect addressing mode of 8051? This question has been answered in one of the threads but i want to know how come 8051 can only select one bit for R0 or R1 and R2 to R7 is not possible. sorry if i sound a little stupid. i am a newbee in 8051

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  • I guess you didn't pick up the hint from my original post where I asked "Are you debating why Intel designed the processor instruction set as they did, trying to cram in so [sic!] much information as possible in a byte".

    They used about 50000 transistors for the complete processor including timers etc. And the instruction set really has to look different when you try to figure out what to store in one byte (8 lonely bits) compared to a processor who reads 32-bits as minimum size from the memory.

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  • I guess you didn't pick up the hint from my original post where I asked "Are you debating why Intel designed the processor instruction set as they did, trying to cram in so [sic!] much information as possible in a byte".

    They used about 50000 transistors for the complete processor including timers etc. And the instruction set really has to look different when you try to figure out what to store in one byte (8 lonely bits) compared to a processor who reads 32-bits as minimum size from the memory.

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