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ADC speed and CPU cycles

I'm investigating using the MCB4300 or MCB1850 for an ADC-centric purpose, but I'd like to know how much CPU is left over if sampling at the full 400kHz.
I'd seen a review of the FFT lib touting its speed, but if we sample at 400k, can it also do FFTs?
If not, can one board do ADC and another FFTs, with some easy/reasonable BUS interface?

Thanks

Parents
  • The bandwidth limitation you are likely to encounter is with the code itself, not an internal ADC transferring directly to tightly coupled internal SRAM. Even external ADC results would need to be pulled into memory, and that's going to be at least as burdensome. For real-time, you'd presumably double the buffer size and ping-pong between the acquired data.

    If the processing is not continuous, you could sample enough points to do the FFT, and once complete grab the next set.

    You should perhaps then evaluate the performance of the code, with some data sets you've generated. The simulator might permit you to get some ball-park figures without actual hardware, as would any M3 part at similar frequencies. Most also include a DWT unit with CPU cycle counter to allow benchmarking such code.

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  • The bandwidth limitation you are likely to encounter is with the code itself, not an internal ADC transferring directly to tightly coupled internal SRAM. Even external ADC results would need to be pulled into memory, and that's going to be at least as burdensome. For real-time, you'd presumably double the buffer size and ping-pong between the acquired data.

    If the processing is not continuous, you could sample enough points to do the FFT, and once complete grab the next set.

    You should perhaps then evaluate the performance of the code, with some data sets you've generated. The simulator might permit you to get some ball-park figures without actual hardware, as would any M3 part at similar frequencies. Most also include a DWT unit with CPU cycle counter to allow benchmarking such code.

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